From: Misha Brukman <brukman+llvm@gmail.com>
Date: Thu, 24 Jun 2004 23:53:24 +0000 (+0000)
Subject: Add a `break' in the switch/case statement between the int/fp sections.
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e327e499138dac76c85076ba9494dab9500f81fa;p=oota-llvm.git

Add a `break' in the switch/case statement between the int/fp sections.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14385 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp
index 34721eeef7b..063001d60bf 100644
--- a/lib/Target/PowerPC/PPC32ISelSimple.cpp
+++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp
@@ -1049,7 +1049,6 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
 ///
 void ISel::visitReturnInst(ReturnInst &I) {
   Value *RetVal = I.getOperand(0);
-
   switch (getClassB(RetVal->getType())) {
   case cByte:   // integral return values: extend or move into r3 and return
   case cShort:
@@ -1303,6 +1302,7 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
     case cInt:
       // Integral results are in r3
       BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
+      break;
     case cFP:     // Floating-point return values live in f1
       BuildMI(BB, PPC32::FMR, 1, Ret.Reg).addReg(PPC32::F1);
       break;
diff --git a/lib/Target/PowerPC/PowerPCISelSimple.cpp b/lib/Target/PowerPC/PowerPCISelSimple.cpp
index 34721eeef7b..063001d60bf 100644
--- a/lib/Target/PowerPC/PowerPCISelSimple.cpp
+++ b/lib/Target/PowerPC/PowerPCISelSimple.cpp
@@ -1049,7 +1049,6 @@ void ISel::promote32(unsigned targetReg, const ValueRecord &VR) {
 ///
 void ISel::visitReturnInst(ReturnInst &I) {
   Value *RetVal = I.getOperand(0);
-
   switch (getClassB(RetVal->getType())) {
   case cByte:   // integral return values: extend or move into r3 and return
   case cShort:
@@ -1303,6 +1302,7 @@ void ISel::doCall(const ValueRecord &Ret, MachineInstr *CallMI,
     case cInt:
       // Integral results are in r3
       BuildMI(BB, PPC32::OR, 2, Ret.Reg).addReg(PPC32::R3).addReg(PPC32::R3);
+      break;
     case cFP:     // Floating-point return values live in f1
       BuildMI(BB, PPC32::FMR, 1, Ret.Reg).addReg(PPC32::F1);
       break;