From: Thomas Gleixner Date: Sun, 6 Feb 2011 23:39:14 +0000 (+0000) Subject: m68knommu: Convert 5249 intc irq_chip to new functions X-Git-Tag: firefly_0821_release~7613^2~2192^2~33 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e474563ebac1ece056024e2395673e6df04f6a7c;p=firefly-linux-kernel-4.4.55.git m68knommu: Convert 5249 intc irq_chip to new functions /me idly wonders what sets the handlers for this chip. Signed-off-by: Thomas Gleixner Signed-off-by: Greg Ungerer --- diff --git a/arch/m68knommu/platform/5249/intc2.c b/arch/m68knommu/platform/5249/intc2.c index c5151f846591..8f4b63e17366 100644 --- a/arch/m68knommu/platform/5249/intc2.c +++ b/arch/m68knommu/platform/5249/intc2.c @@ -17,32 +17,32 @@ #include #include -static void intc2_irq_gpio_mask(unsigned int irq) +static void intc2_irq_gpio_mask(struct irq_data *d) { u32 imr; imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); - imr &= ~(0x1 << (irq - MCFINTC2_GPIOIRQ0)); + imr &= ~(0x1 << (d->irq - MCFINTC2_GPIOIRQ0)); writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); } -static void intc2_irq_gpio_unmask(unsigned int irq) +static void intc2_irq_gpio_unmask(struct irq_data *d) { u32 imr; imr = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); - imr |= (0x1 << (irq - MCFINTC2_GPIOIRQ0)); + imr |= (0x1 << (d->irq - MCFINTC2_GPIOIRQ0)); writel(imr, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE); } -static void intc2_irq_gpio_ack(unsigned int irq) +static void intc2_irq_gpio_ack(struct irq_data *d) { - writel(0x1 << (irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR); + writel(0x1 << (d->irq - MCFINTC2_GPIOIRQ0), MCF_MBAR2 + MCFSIM2_GPIOINTCLEAR); } static struct irq_chip intc2_irq_gpio_chip = { .name = "CF-INTC2", - .mask = intc2_irq_gpio_mask, - .unmask = intc2_irq_gpio_unmask, - .ack = intc2_irq_gpio_ack, + .irq_mask = intc2_irq_gpio_mask, + .irq_unmask = intc2_irq_gpio_unmask, + .irq_ack = intc2_irq_gpio_ack, }; static int __init mcf_intc2_init(void) @@ -51,7 +51,7 @@ static int __init mcf_intc2_init(void) /* GPIO interrupt sources */ for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { - irq_desc[irq].chip = &intc2_irq_gpio_chip; + set_irq_chip(irq, &intc2_irq_gpio_chip); set_irq_handler(irq, handle_edge_irq); }