From: Tkhai Kirill Date: Tue, 10 Jan 2012 13:17:03 +0000 (+0000) Subject: sparc32: forced setting of mode of sun4m per-cpu timers X-Git-Tag: firefly_0821_release~3680^2~3626^2 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e51e07e0ac7e3ff847d640f41b7527db04d4a4e7;p=firefly-linux-kernel-4.4.55.git sparc32: forced setting of mode of sun4m per-cpu timers SUN4M per-cpu timers have two modes of work. These are timer mode and counter mode. Kernel doesn't write anything to the register, which is connected with mode choice. So, the mode is chosen by bootloader. This patch forces to use timer mode from the kernel and to be independent of bootloader. I had this problem with OpenBIOS. Timers don't tick and kernel fails on QEMU, when it's compiled with SMP support. The patch fixes problem. Signed-off-by: Tkhai Kirill Acked-by: Sam Ravnborg Signed-off-by: David S. Miller --- diff --git a/arch/sparc/kernel/sun4m_irq.c b/arch/sparc/kernel/sun4m_irq.c index 422c16dad1f6..e61165161dd3 100644 --- a/arch/sparc/kernel/sun4m_irq.c +++ b/arch/sparc/kernel/sun4m_irq.c @@ -399,6 +399,9 @@ static void __init sun4m_init_timers(irq_handler_t counter_fn) timers_global = (void __iomem *) (unsigned long) addr[num_cpu_timers]; + /* Every per-cpu timer works in timer mode */ + sbus_writel(0x00000000, &timers_global->timer_config); + sbus_writel((((1000000/HZ) + 1) << 10), &timers_global->l10_limit); master_l10_counter = &timers_global->l10_count;