From: chenxing Date: Wed, 25 Apr 2012 08:38:48 +0000 (+0800) Subject: rk30:sdk: add arm logic table analysis function in dvfs.c X-Git-Tag: firefly_0821_release~9310 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e53c848a809d85779e9cff296f15fb0700ceefcf;p=firefly-linux-kernel-4.4.55.git rk30:sdk: add arm logic table analysis function in dvfs.c --- diff --git a/arch/arm/mach-rk30/dvfs.c b/arch/arm/mach-rk30/dvfs.c index 95a84a8097aa..1f3b9ac8bc85 100755 --- a/arch/arm/mach-rk30/dvfs.c +++ b/arch/arm/mach-rk30/dvfs.c @@ -257,6 +257,27 @@ int dvfs_set_depend_table(struct clk *clk, char *vd_name, struct cpufreq_frequen return 0; } +int dvfs_set_arm_logic_volt(struct dvfs_arm_table *dvfs_cpu_logic_table, + struct cpufreq_frequency_table *cpu_dvfs_table, + struct cpufreq_frequency_table *dep_cpu2core_table) +{ + int i = 0; + for (i = 0; dvfs_cpu_logic_table[i].frequency != CPUFREQ_TABLE_END; i++) { + cpu_dvfs_table[i].frequency = dvfs_cpu_logic_table[i].frequency; + cpu_dvfs_table[i].index = dvfs_cpu_logic_table[i].cpu_volt; + + dep_cpu2core_table[i].frequency = dvfs_cpu_logic_table[i].frequency; + dep_cpu2core_table[i].index = dvfs_cpu_logic_table[i].logic_volt; + } + + cpu_dvfs_table[i].frequency = CPUFREQ_TABLE_END; + dep_cpu2core_table[i].frequency = CPUFREQ_TABLE_END; + + dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), cpu_dvfs_table); + dvfs_set_depend_table(clk_get(NULL, "cpu"), "vd_core", dep_cpu2core_table); + return 0; +} + int clk_enable_dvfs(struct clk *clk) { struct regulator *regulator; diff --git a/arch/arm/mach-rk30/include/mach/dvfs.h b/arch/arm/mach-rk30/include/mach/dvfs.h index 8f4ce715ede4..256e6adbdb0b 100755 --- a/arch/arm/mach-rk30/include/mach/dvfs.h +++ b/arch/arm/mach-rk30/include/mach/dvfs.h @@ -125,6 +125,7 @@ struct clk_node { struct cpufreq_frequency_table *dvfs_table; clk_dvfs_target_callback clk_dvfs_target; }; + struct dvfs_arm_table { unsigned int frequency; /* kHz - doesn't need to be in ascending * order */ @@ -132,6 +133,7 @@ struct dvfs_arm_table { unsigned int logic_volt; }; + #ifdef CONFIG_DVFS int rk30_dvfs_init(void); int is_support_dvfs(struct clk_node *dvfs_info); @@ -142,6 +144,7 @@ void dvfs_clk_register_set_rate_callback(struct clk *clk, clk_dvfs_target_callba struct cpufreq_frequency_table *dvfs_get_freq_volt_table(struct clk *clk); int dvfs_set_freq_volt_table(struct clk *clk, struct cpufreq_frequency_table *table); int dvfs_set_depend_table(struct clk *clk, char *vd_name, struct cpufreq_frequency_table *table); +int dvfs_set_arm_logic_volt(struct dvfs_arm_table *dvfs_cpu_logic_table, struct cpufreq_frequency_table *cpu_dvfs_table, struct cpufreq_frequency_table *dep_cpu2core_table); #else static inline int rk30_dvfs_init(void) { return 0; } static inline int is_support_dvfs(struct clk_node *dvfs_info) { return 0; } @@ -152,6 +155,8 @@ static inline void dvfs_clk_register_set_rate_callback(struct clk *clk, clk_dvfs static inline struct cpufreq_frequency_table *dvfs_get_freq_volt_table(struct clk *clk) { return NULL; } static inline int dvfs_set_freq_volt_table(struct clk *clk, struct cpufreq_frequency_table *table) { return 0; } static inline int dvfs_set_depend_table(struct clk *clk, char *vd_name, struct cpufreq_frequency_table *table) {return 0;} +int dvfs_set_arm_logic_volt(struct dvfs_arm_table *dvfs_cpu_logic_table, struct cpufreq_frequency_table *cpu_dvfs_table, struct cpufreq_frequency_table *dep_cpu2core_table){ return 0; } + #endif #endif