From: 黄涛 Date: Tue, 17 Jul 2012 06:48:20 +0000 (+0800) Subject: rk31: add fpga board support X-Git-Tag: firefly_0821_release~8912^2~82 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e6a9f68960a1e30eceb5117cfe7ee0b22246fbc0;p=firefly-linux-kernel-4.4.55.git rk31: add fpga board support --- diff --git a/arch/arm/configs/rk31_fpga_defconfig b/arch/arm/configs/rk31_fpga_defconfig new file mode 100644 index 000000000000..c58c4ba18355 --- /dev/null +++ b/arch/arm/configs/rk31_fpga_defconfig @@ -0,0 +1,96 @@ +CONFIG_EXPERIMENTAL=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZO=y +CONFIG_LOG_BUF_SHIFT=19 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_INITRAMFS_SOURCE="root" +CONFIG_INITRAMFS_COMPRESSION_GZIP=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_PANIC_TIMEOUT=1 +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_ELF_CORE is not set +CONFIG_ASHMEM=y +# CONFIG_AIO is not set +CONFIG_EMBEDDED=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_ARCH_RK31=y +# CONFIG_DDR_TEST is not set +# CONFIG_RK29_LAST_LOG is not set +CONFIG_RK_DEBUG_UART=1 +# CONFIG_CACHE_L2X0 is not set +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_PREEMPT=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init debug" +CONFIG_VFP=y +CONFIG_WAKELOCK=y +CONFIG_PM_RUNTIME=y +CONFIG_SUSPEND_TIME=y +CONFIG_NET=y +CONFIG_UNIX=y +# CONFIG_NET_ACTIVITY_STATS is not set +# CONFIG_WIRELESS is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_MTD=y +CONFIG_MISC_DEVICES=y +# CONFIG_ANDROID_PMEM is not set +CONFIG_INPUT_POLLDEV=y +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +# CONFIG_CONSOLE_TRANSLATIONS is not set +# CONFIG_LEGACY_PTYS is not set +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +CONFIG_I2C0_CONTROLLER_RK30=y +CONFIG_I2C2_CONTROLLER_RK30=y +# CONFIG_I2C3_RK30 is not set +# CONFIG_ADC is not set +CONFIG_EXPANDED_GPIO_NUM=0 +CONFIG_EXPANDED_GPIO_IRQ_NUM=0 +CONFIG_SPI_FPGA_GPIO_NUM=0 +CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0 +# CONFIG_HWMON is not set +# CONFIG_MFD_SUPPORT is not set +# CONFIG_HID_SUPPORT is not set +# CONFIG_USB_SUPPORT is not set +CONFIG_RTC_CLASS=y +# CONFIG_CMMB is not set +# CONFIG_DNOTIFY is not set +CONFIG_TMPFS=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y +CONFIG_DEBUG_KERNEL=y +CONFIG_DETECT_HUNG_TASK=y +# CONFIG_SCHED_DEBUG is not set +CONFIG_SCHEDSTATS=y +CONFIG_TIMER_STATS=y +CONFIG_SLUB_DEBUG_ON=y +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_FTRACE is not set diff --git a/arch/arm/mach-rk30/board-rk31-fpga.c b/arch/arm/mach-rk30/board-rk31-fpga.c new file mode 100644 index 000000000000..4495e7ca3cd9 --- /dev/null +++ b/arch/arm/mach-rk30/board-rk31-fpga.c @@ -0,0 +1,288 @@ +/* + * Copyright (C) 2012 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +//i2c +#ifdef CONFIG_I2C0_RK30 +static struct i2c_board_info __initdata i2c0_info[] = { +}; +#endif +#ifdef CONFIG_I2C1_RK30 +static struct i2c_board_info __initdata i2c1_info[] = { +}; +#endif +#ifdef CONFIG_I2C2_RK30 +static struct i2c_board_info __initdata i2c2_info[] = { +}; +#endif +#ifdef CONFIG_I2C3_RK30 +static struct i2c_board_info __initdata i2c3_info[] = { +}; +#endif + +#ifdef CONFIG_I2C_GPIO_RK30 +static struct i2c_board_info __initdata i2c_gpio_info[] = { +}; +#endif + +static void __init rk30_i2c_register_board_info(void) +{ +#ifdef CONFIG_I2C0_RK30 + i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info)); +#endif +#ifdef CONFIG_I2C1_RK30 + i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info)); +#endif +#ifdef CONFIG_I2C2_RK30 + i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info)); +#endif +#ifdef CONFIG_I2C3_RK30 + i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info)); +#endif +#ifdef CONFIG_I2C_GPIO_RK30 + i2c_register_board_info(4, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info)); +#endif +} +//end of i2c + +static struct spi_board_info board_spi_devices[] = { +}; + +static struct platform_device *devices[] __initdata = { +}; + +static void __init rk31_board_init(void) +{ + rk30_i2c_register_board_info(); + spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices)); + platform_add_devices(devices, ARRAY_SIZE(devices)); +} + +static void __init rk31_reserve(void) +{ + board_mem_reserved(); +} + +#include + +struct clk { + const char *name; + unsigned long rate; +}; + +static struct clk xin24m = { + .name = "xin24m", + .rate = 24000000, +}; + +#define CLK(dev, con, ck) \ + { \ + .dev_id = dev, \ + .con_id = con, \ + .clk = ck, \ + } + +static struct clk_lookup clks[] = { + CLK("rk30_i2c.0", "i2c", &xin24m), + CLK("rk30_i2c.1", "i2c", &xin24m), + CLK("rk30_i2c.2", "i2c", &xin24m), + CLK("rk30_i2c.3", "i2c", &xin24m), + CLK("rk30_i2c.4", "i2c", &xin24m), + CLK("rk29xx_spim.0", "spi", &xin24m), + CLK("rk29xx_spim.1", "spi", &xin24m), + + CLK("rk_serial.0", "uart_div", &xin24m), + CLK("rk_serial.0", "uart_frac_div", &xin24m), + CLK("rk_serial.0", "uart", &xin24m), + CLK("rk_serial.0", "pclk_uart", &xin24m), + CLK("rk_serial.1", "uart_div", &xin24m), + CLK("rk_serial.1", "uart_frac_div", &xin24m), + CLK("rk_serial.1", "uart", &xin24m), + CLK("rk_serial.1", "pclk_uart", &xin24m), + CLK("rk_serial.2", "uart_div", &xin24m), + CLK("rk_serial.2", "uart_frac_div", &xin24m), + CLK("rk_serial.2", "uart", &xin24m), + CLK("rk_serial.2", "pclk_uart", &xin24m), + + CLK("rk29_i2s.0", "i2s_div", &xin24m), + CLK("rk29_i2s.0", "i2s_frac_div", &xin24m), + CLK("rk29_i2s.0", "i2s", &xin24m), + CLK("rk29_i2s.0", "hclk_i2s", &xin24m), +}; + +static void __init rk30_clock_init(void) +{ + struct clk_lookup *lk; + + for (lk = clks; lk < clks + ARRAY_SIZE(clks); lk++) { + clkdev_add(lk); + } +} + +void __init board_clock_init(void) +{ + rk30_clock_init(); +} + +int __init clk_disable_unused(void) +{ + return 0; +} + +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +unsigned long clk_get_rate(struct clk *clk) +{ + return 24000000; +} +EXPORT_SYMBOL(clk_get_rate); + +int clk_set_rate(struct clk *clk, unsigned long rate) +{ + return 0; +} +EXPORT_SYMBOL(clk_set_rate); + +int clk_set_parent(struct clk *clk, struct clk *parent) +{ + return 0; +} +EXPORT_SYMBOL(clk_set_parent); + +#include +#include + +#define EV_ENCALL KEY_F4 +#define EV_MENU KEY_F1 + +#define PRESS_LEV_LOW 1 +#define PRESS_LEV_HIGH 0 + +static struct rk29_keys_button key_button[] = { + { + .desc = "menu", + .code = EV_MENU, + .gpio = RK30_PIN3_PB2, + .active_low = PRESS_LEV_LOW, + }, + { + .desc = "vol+", + .code = KEY_VOLUMEUP, + .gpio = RK30_PIN3_PB1, + .active_low = PRESS_LEV_LOW, + }, + { + .desc = "vol-", + .code = KEY_VOLUMEDOWN, + .gpio = RK30_PIN3_PB0, + .active_low = PRESS_LEV_LOW, + }, + { + .desc = "home", + .code = KEY_HOME, + .gpio = RK30_PIN3_PB3, + .active_low = PRESS_LEV_LOW, + }, + { + .desc = "esc", + .code = KEY_BACK, + .gpio = RK30_PIN3_PB4, + .active_low = PRESS_LEV_LOW, + }, + { + .desc = "key6", + .code = KEY_CAMERA, + .gpio = RK30_PIN3_PB5, + .active_low = PRESS_LEV_LOW, + }, +}; + +struct rk29_keys_platform_data rk29_keys_pdata = { + .buttons = key_button, + .nbuttons = ARRAY_SIZE(key_button), + .chn = -1, //chn: 0-7, if do not use ADC,set 'chn' -1 +}; + +static void __init fpga_fixup(struct machine_desc *desc, struct tag *tags, + char **cmdline, struct meminfo *mi) +{ + mi->nr_banks = 1; + mi->bank[0].start = PLAT_PHYS_OFFSET; + mi->bank[0].size = SZ_128M; +} + +#include +static void fpga_reset(char mode, const char *cmd) +{ + while (1); +} + +static void __init fpga_map_io(void) +{ + arch_reset = fpga_reset; + rk30_map_common_io(); + rk29_setup_early_printk(); + rk29_sram_init(); + board_clock_init(); + rk30_iomux_init(); +} + +MACHINE_START(RK31, "RK31board") + .boot_params = PLAT_PHYS_OFFSET + 0x800, + .fixup = fpga_fixup, + .reserve = &rk31_reserve, + .map_io = fpga_map_io, + .init_irq = rk30_init_irq, + .timer = &rk30_timer, + .init_machine = rk31_board_init, +MACHINE_END