From: Zheng Yang <zhengyang@rock-chips.com>
Date: Thu, 10 Jul 2014 09:13:56 +0000 (+0800)
Subject: rk3036 lcdc:
X-Git-Tag: firefly_0821_release~4916^2~274
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e77353dfd6a3e696f5091443b6d143abebe36066;p=firefly-linux-kernel-4.4.55.git

rk3036 lcdc:
	1. fix some register define error.
	2. disable mmu.
---

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index fbb39e7b8794..fc1f7cf10725 100755
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -518,7 +518,7 @@
 		status = "disabled";
 		clocks = <&clk_gates9 6>, <&dclk_lcdc1>, <&clk_gates9 5>;
 		clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc";
-		rockchip,iommu-enabled = <1>;
+		rockchip,iommu-enabled = <0>;
 	};
 	
 	hdmi: hdmi@20034000 {
diff --git a/drivers/video/rockchip/lcdc/rk3036_lcdc.c b/drivers/video/rockchip/lcdc/rk3036_lcdc.c
index 526b742a1f73..0b729551bbc5 100644
--- a/drivers/video/rockchip/lcdc/rk3036_lcdc.c
+++ b/drivers/video/rockchip/lcdc/rk3036_lcdc.c
@@ -1033,13 +1033,13 @@ static int rk3036_lcdc_open_bcsh(struct rk_lcdc_driver *dev_drv, bool open)
 	spin_lock(&lcdc_dev->reg_lock);
 	if (lcdc_dev->clk_on) {
 		if (open) {
-			lcdc_writel(lcdc_dev,BCSH_COLOR_BAR,0x1);
+			lcdc_writel(lcdc_dev,BCSH_CTRL,0x1);
 			lcdc_writel(lcdc_dev,BCSH_BCS,0xd0010000);
 			lcdc_writel(lcdc_dev,BCSH_H,0x01000000);
 		} else {
 			mask = m_BCSH_EN;
 			val = v_BCSH_EN(0);
-			lcdc_msk_reg(lcdc_dev, BCSH_COLOR_BAR, mask, val);
+			lcdc_msk_reg(lcdc_dev, BCSH_CTRL, mask, val);
 		}
 		lcdc_cfg_done(lcdc_dev);
 	}
diff --git a/drivers/video/rockchip/lcdc/rk3036_lcdc.h b/drivers/video/rockchip/lcdc/rk3036_lcdc.h
index 9c37f9b7a285..608465ac4d81 100644
--- a/drivers/video/rockchip/lcdc/rk3036_lcdc.h
+++ b/drivers/video/rockchip/lcdc/rk3036_lcdc.h
@@ -166,7 +166,7 @@
 	#define m_WIN1_PREMUL_SCALE	(1<<3)
 	#define m_WIN0_ALPHA_VAL	(0xff<<4)
 	#define m_WIN1_ALPHA_VAL	(0xff<<12)
-	#define m_HWC_ALPAH_VAL		(0x0f<<20)
+	#define m_HWC_ALPAH_VAL		(0xff<<20)
 	
 	#define v_WIN0_ALPHA_EN(x)	(((x)&1)<<0)
 	#define v_WIN1_ALPHA_EN(x)	(((x)&1)<<1)
@@ -174,7 +174,7 @@
 	#define v_WIN1_PREMUL_SCALE(x)	(((x)&1)<<3)
 	#define v_WIN0_ALPHA_VAL(x)	(((x)&0xff)<<4)
 	#define v_WIN1_ALPHA_VAL(x)	(((x)&0xff)<<12)
-	#define v_HWC_ALPAH_VAL(x)	(((x)&0x0f)<<20)
+	#define v_HWC_ALPAH_VAL(x)	(((x)&0xff)<<20)
 
 #define WIN0_COLOR_KEY		(0x18)
 #define WIN1_COLOR_KEY		(0x1C)
@@ -257,35 +257,39 @@
 #define DSP_VACT_ST_END_F1	(0x80)
 
 /*BCSH Registers*/
-#define BCSH_COLOR_BAR 			(0xD0)
-	#define v_BCSH_EN(x)			(((x)&1)<<0)
-	#define v_BCSH_COLOR_BAR_Y(x)		(((x)&0x3ff)<<2)
-	#define v_BCSH_COLOR_BAR_U(x)		(((x)&0x3ff)<<12)
-	#define v_BCSH_COLOR_BAR_V(x)		(((x)&0x3ff)<<22)
-
-	#define m_BCSH_EN			(1<<0)
-	#define m_BCSH_COLOR_BAR_Y		(0x3ff<<2)
-	#define m_BCSH_COLOR_BAR_U		(0x3ff<<12)
-	#define m_BCSH_COLOR_BAR_V		((u32)0x3ff<<22)
-
-#define BCSH_BCS 			(0xD4)
-	#define v_BCSH_BRIGHTNESS(x)		(((x)&0xff)<<0)	
-	#define v_BCSH_CONTRAST(x)		(((x)&0x1ff)<<8)	
-	#define v_BCSH_SAT_CON(x)		(((x)&0x3ff)<<20)	
-	#define v_BCSH_OUT_MODE(x)		(((x)&0x3)<<30)	
+#define BCSH_CTRL			(0xD0)
+	#define m_BCSH_EN		(1 << 0)
+	#define m_BCSH_OUT_MODE		(3 << 2)
+	#define m_BCSH_CSC_MODE		(3 << 4)
 	
-	#define m_BCSH_BRIGHTNESS		(0xff<<0)	
-	#define m_BCSH_CONTRAST			(0x1ff<<8)
-	#define m_BCSH_SAT_CON			(0x3ff<<20)	
-	#define m_BCSH_OUT_MODE			((u32)0x3<<30)	
-
+	#define v_BCSH_EN(x)		( (1 & x) << 0)
+	#define v_BCSH_OUT_MODE(x)	( (3 & x) << 2)
+	#define v_BCSH_CSC_MODE(x)	( (3 & x) << 4)
+
+#define BCSH_COLOR_BAR 			(0xD4)
+	#define v_BCSH_COLOR_BAR_Y(x)		(((x)&0xf) << 0)
+	#define v_BCSH_COLOR_BAR_U(x)		(((x)&0xf) << 8)
+	#define v_BCSH_COLOR_BAR_V(x)		(((x)&0xf) << 16)
+
+	#define m_BCSH_COLOR_BAR_Y		(0xf << 0)
+	#define m_BCSH_COLOR_BAR_U		(0xf << 8)
+	#define m_BCSH_COLOR_BAR_V		(0xf << 16)
+
+#define BCSH_BCS 			(0xD8)
+	#define v_BCSH_BRIGHTNESS(x)		(((x)&0x1f) << 0)	
+	#define v_BCSH_CONTRAST(x)		(((x)&0xf) << 8)	
+	#define v_BCSH_SAT_CON(x)		(((x)&0xf) << 16)	
+	
+	#define m_BCSH_BRIGHTNESS		(0x1f << 0)	
+	#define m_BCSH_CONTRAST			(0xf << 8)
+	#define m_BCSH_SAT_CON			(0xf << 16)		
 
-#define BCSH_H 				(0xD8)
-	#define v_BCSH_SIN_HUE(x)		(((x)&0x1ff)<<0)
-	#define v_BCSH_COS_HUE(x)		(((x)&0x1ff)<<16)
+#define BCSH_H 				(0xDC)
+	#define v_BCSH_SIN_HUE(x)		(((x)&0xf) << 0)
+	#define v_BCSH_COS_HUE(x)		(((x)&0xf) << 16)
 	
-	#define m_BCSH_SIN_HUE			(0x1ff<<0)
-	#define m_BCSH_COS_HUE			(0x1ff<<16)
+	#define m_BCSH_SIN_HUE			(0xf << 0)
+	#define m_BCSH_COS_HUE			(0xf << 16)
 
 /* Bus Register */
 #define AXI_BUS_CTRL		(0x2C)