From: Paul Zimmerman Date: Tue, 16 Sep 2014 20:47:26 +0000 (-0700) Subject: usb: dwc2: clip max_transfer_size to 65535 X-Git-Tag: firefly_0821_release~176^2~3122^2~112 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=e8f8c14d9da7ab1b8a7b0f769cd7148ca2cc7d10;p=firefly-linux-kernel-4.4.55.git usb: dwc2: clip max_transfer_size to 65535 Clip max_transfer_size to 65535 for host. dwc2_hc_setup_align_buf() allocates coherent buffers with this size, and if it's too large we can exhaust the coherent DMA pool. Tested on Raspberry Pi and Altera SOCFPGA. Signed-off-by: Paul Zimmerman Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c index ea0048a724cf..d9269459d481 100644 --- a/drivers/usb/dwc2/core.c +++ b/drivers/usb/dwc2/core.c @@ -2743,6 +2743,13 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg) width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >> GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT; hw->max_transfer_size = (1 << (width + 11)) - 1; + /* + * Clip max_transfer_size to 65535. dwc2_hc_setup_align_buf() allocates + * coherent buffers with this size, and if it's too large we can + * exhaust the coherent DMA pool. + */ + if (hw->max_transfer_size > 65535) + hw->max_transfer_size = 65535; width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >> GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT; hw->max_packet_count = (1 << (width + 4)) - 1;