From: Damien Lespiau Date: Tue, 20 Jan 2015 12:51:45 +0000 (+0000) Subject: drm/i915: Use a common function for computing the fb height alignment X-Git-Tag: firefly_0821_release~176^2~1915^2~35^2~153 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=ec2c981e6232ac2039e679d24642b80fbbd2acc6;p=firefly-linux-kernel-4.4.55.git drm/i915: Use a common function for computing the fb height alignment If we need to change the fb height constraints, it sounds like a good idea to have to do it in one place only. v2: v2: Rebase on top of Ander's "Make intel_crtc->config a pointer" Reviewed-By: Tvrtko Ursulin (v1) Signed-off-by: Damien Lespiau Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 98cd20adac1f..91954ff8ec3e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2188,11 +2188,12 @@ static bool need_vtd_wa(struct drm_device *dev) return false; } -static int intel_align_height(struct drm_device *dev, int height, bool tiled) +int +intel_fb_align_height(struct drm_device *dev, int height, unsigned int tiling) { int tile_height; - tile_height = tiled ? (IS_GEN2(dev) ? 16 : 8) : 1; + tile_height = tiling ? (IS_GEN2(dev) ? 16 : 8) : 1; return ALIGN(height, tile_height); } @@ -6590,8 +6591,9 @@ static void i9xx_get_plane_config(struct intel_crtc *crtc, val = I915_READ(DSPSTRIDE(pipe)); crtc->base.primary->fb->pitches[0] = val & 0xffffffc0; - aligned_height = intel_align_height(dev, crtc->base.primary->fb->height, - plane_config->tiling); + aligned_height = intel_fb_align_height(dev, + crtc->base.primary->fb->height, + plane_config->tiling); plane_config->size = PAGE_ALIGN(crtc->base.primary->fb->pitches[0] * aligned_height); @@ -7644,8 +7646,9 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc, val = I915_READ(DSPSTRIDE(pipe)); crtc->base.primary->fb->pitches[0] = val & 0xffffffc0; - aligned_height = intel_align_height(dev, crtc->base.primary->fb->height, - plane_config->tiling); + aligned_height = intel_fb_align_height(dev, + crtc->base.primary->fb->height, + plane_config->tiling); plane_config->size = PAGE_ALIGN(crtc->base.primary->fb->pitches[0] * aligned_height); @@ -12609,8 +12612,8 @@ static int intel_framebuffer_init(struct drm_device *dev, if (mode_cmd->offsets[0] != 0) return -EINVAL; - aligned_height = intel_align_height(dev, mode_cmd->height, - obj->tiling_mode); + aligned_height = intel_fb_align_height(dev, mode_cmd->height, + obj->tiling_mode); /* FIXME drm helper for size checks (especially planar formats)? */ if (obj->base.size < aligned_height * mode_cmd->pitches[0]) return -EINVAL; diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 04e2cfcc630b..47a452a5ed17 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -872,6 +872,8 @@ void intel_frontbuffer_flip(struct drm_device *dev, intel_frontbuffer_flush(dev, frontbuffer_bits); } +int intel_fb_align_height(struct drm_device *dev, int height, + unsigned int tiling); void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire); diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c index 6b18821a0eb2..ece702235b38 100644 --- a/drivers/gpu/drm/i915/intel_fbdev.c +++ b/drivers/gpu/drm/i915/intel_fbdev.c @@ -593,7 +593,8 @@ static bool intel_fbdev_init_bios(struct drm_device *dev, } cur_size = intel_crtc->config->base.adjusted_mode.crtc_vdisplay; - cur_size = ALIGN(cur_size, plane_config->tiling ? (IS_GEN2(dev) ? 16 : 8) : 1); + cur_size = intel_fb_align_height(dev, cur_size, + plane_config->tiling); cur_size *= fb->base.pitches[0]; DRM_DEBUG_KMS("pipe %c area: %dx%d, bpp: %d, size: %d\n", pipe_name(intel_crtc->pipe),