From: cym <cym@rock-chips.com>
Date: Thu, 28 Mar 2013 02:18:20 +0000 (+0800)
Subject: RK3168:restore clk_cpu:aclk_cpu to default value for RK3168 reboot
X-Git-Tag: firefly_0821_release~7329
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=ed653d1c1a2a5a9d17560cad017d64e20a5b1681;p=firefly-linux-kernel-4.4.55.git

RK3168:restore clk_cpu:aclk_cpu to default value for RK3168 reboot
---

diff --git a/arch/arm/mach-rk30/reset.c b/arch/arm/mach-rk30/reset.c
index d86811c21d13..f897f7849450 100644
--- a/arch/arm/mach-rk30/reset.c
+++ b/arch/arm/mach-rk30/reset.c
@@ -27,8 +27,14 @@ static void rk30_arch_reset(char mode, const char *cmd)
 	writel_relaxed(boot_flag, RK30_PMU_BASE + PMU_SYS_REG0);	// for loader
 	writel_relaxed(boot_mode, RK30_PMU_BASE + PMU_SYS_REG1);	// for linux
 	dsb();
-	/* disable remap */
-	writel_relaxed(1 << (12 + 16), RK30_GRF_BASE + GRF_SOC_CON0);
+
+	/* restore clk_cpu:aclk_cpu to default value for RK3168 */
+#if defined(CONFIG_ARCH_RK3066B)
+	writel_relaxed(0x00070001 , RK30_CRU_BASE + CRU_CLKSELS_CON(1));
+#endif
+
+        /* disable remap */
+        writel_relaxed(1 << (12 + 16), RK30_GRF_BASE + GRF_SOC_CON0);
 	/* pll enter slow mode */
 	writel_relaxed(PLL_MODE_SLOW(APLL_ID) | PLL_MODE_SLOW(CPLL_ID) | PLL_MODE_SLOW(GPLL_ID), RK30_CRU_BASE + CRU_MODE_CON);
 	dsb();