From: Jingyue Wu Date: Wed, 12 Nov 2014 07:19:25 +0000 (+0000) Subject: Reverts r221772 which fails tests X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=ee709fe497ef10f178c119acd5e64eeb8c4a503d;p=oota-llvm.git Reverts r221772 which fails tests git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221773 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp b/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp index 5aea7021e42..bcac6392a67 100644 --- a/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp +++ b/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp @@ -36,14 +36,12 @@ void initializeNVPTXTTIPass(PassRegistry &); namespace { class NVPTXTTI final : public ImmutablePass, public TargetTransformInfo { - const NVPTXTargetLowering *TLI; public: - NVPTXTTI() : ImmutablePass(ID), TLI(nullptr) { + NVPTXTTI() : ImmutablePass(ID) { llvm_unreachable("This pass cannot be directly constructed"); } - NVPTXTTI(const NVPTXTargetMachine *TM) - : ImmutablePass(ID), TLI(TM->getSubtargetImpl()->getTargetLowering()) { + NVPTXTTI(const NVPTXTargetMachine *TM) : ImmutablePass(ID) { initializeNVPTXTTIPass(*PassRegistry::getPassRegistry()); } @@ -65,12 +63,6 @@ public: bool hasBranchDivergence() const override; - unsigned getArithmeticInstrCost( - unsigned Opcode, Type *Ty, OperandValueKind Opd1Info = OK_AnyValue, - OperandValueKind Opd2Info = OK_AnyValue, - OperandValueProperties Opd1PropInfo = OP_None, - OperandValueProperties Opd2PropInfo = OP_None) const override; - /// @} }; @@ -86,32 +78,3 @@ llvm::createNVPTXTargetTransformInfoPass(const NVPTXTargetMachine *TM) { } bool NVPTXTTI::hasBranchDivergence() const { return true; } - -unsigned NVPTXTTI::getArithmeticInstrCost( - unsigned Opcode, Type *Ty, OperandValueKind Opd1Info, - OperandValueKind Opd2Info, OperandValueProperties Opd1PropInfo, - OperandValueProperties Opd2PropInfo) const { - // Legalize the type. - std::pair LT = TLI->getTypeLegalizationCost(Ty); - - int ISD = TLI->InstructionOpcodeToISD(Opcode); - - switch (ISD) { - default: - return TargetTransformInfo::getArithmeticInstrCost( - Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo); - case ISD::ADD: - case ISD::MUL: - case ISD::XOR: - case ISD::OR: - case ISD::AND: - // The machine code (SASS) simulates an i64 with two i32. Therefore, we - // estimate that arithmetic operations on i64 are twice as expensive as - // those on types that can fit into one machine register. - if (LT.second.SimpleTy == MVT::i64) - return 2 * LT.first; - // Delegate other cases to the basic TTI. - return TargetTransformInfo::getArithmeticInstrCost( - Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo); - } -} diff --git a/lib/Transforms/Scalar/IndVarSimplify.cpp b/lib/Transforms/Scalar/IndVarSimplify.cpp index bf90912ebd0..03dffb66f35 100644 --- a/lib/Transforms/Scalar/IndVarSimplify.cpp +++ b/lib/Transforms/Scalar/IndVarSimplify.cpp @@ -31,7 +31,6 @@ #include "llvm/Analysis/LoopInfo.h" #include "llvm/Analysis/LoopPass.h" #include "llvm/Analysis/ScalarEvolutionExpander.h" -#include "llvm/Analysis/TargetTransformInfo.h" #include "llvm/IR/BasicBlock.h" #include "llvm/IR/CFG.h" #include "llvm/IR/Constants.h" @@ -70,12 +69,11 @@ static cl::opt ReduceLiveIVs("liv-reduce", cl::Hidden, namespace { class IndVarSimplify : public LoopPass { - LoopInfo *LI; - ScalarEvolution *SE; - DominatorTree *DT; - const DataLayout *DL; - TargetLibraryInfo *TLI; - const TargetTransformInfo *TTI; + LoopInfo *LI; + ScalarEvolution *SE; + DominatorTree *DT; + const DataLayout *DL; + TargetLibraryInfo *TLI; SmallVector DeadInsts; bool Changed; @@ -663,7 +661,7 @@ namespace { /// extended by this sign or zero extend operation. This is used to determine /// the final width of the IV before actually widening it. static void visitIVCast(CastInst *Cast, WideIVInfo &WI, ScalarEvolution *SE, - const DataLayout *DL, const TargetTransformInfo *TTI) { + const DataLayout *DL) { bool IsSigned = Cast->getOpcode() == Instruction::SExt; if (!IsSigned && Cast->getOpcode() != Instruction::ZExt) return; @@ -673,19 +671,6 @@ static void visitIVCast(CastInst *Cast, WideIVInfo &WI, ScalarEvolution *SE, if (DL && !DL->isLegalInteger(Width)) return; - // Cast is either an sext or zext up to this point. - // We should not widen an indvar if arithmetics on the wider indvar are more - // expensive than those on the narrower indvar. We check only the cost of ADD - // because at least an ADD is required to increment the induction variable. We - // could compute more comprehensively the cost of all instructions on the - // induction variable when necessary. - if (TTI && - TTI->getArithmeticInstrCost(Instruction::Add, Ty) > - TTI->getArithmeticInstrCost(Instruction::Add, - Cast->getOperand(0)->getType())) { - return; - } - if (!WI.WidestNativeType) { WI.WidestNativeType = SE->getEffectiveSCEVType(Ty); WI.IsSigned = IsSigned; @@ -1202,16 +1187,14 @@ namespace { class IndVarSimplifyVisitor : public IVVisitor { ScalarEvolution *SE; const DataLayout *DL; - const TargetTransformInfo *TTI; PHINode *IVPhi; public: WideIVInfo WI; IndVarSimplifyVisitor(PHINode *IV, ScalarEvolution *SCEV, - const DataLayout *DL, const TargetTransformInfo *TTI, - const DominatorTree *DTree) - : SE(SCEV), DL(DL), TTI(TTI), IVPhi(IV) { + const DataLayout *DL, const DominatorTree *DTree): + SE(SCEV), DL(DL), IVPhi(IV) { DT = DTree; WI.NarrowIV = IVPhi; if (ReduceLiveIVs) @@ -1219,9 +1202,7 @@ namespace { } // Implement the interface used by simplifyUsersOfIV. - void visitCast(CastInst *Cast) override { - visitIVCast(Cast, WI, SE, DL, TTI); - } + void visitCast(CastInst *Cast) override { visitIVCast(Cast, WI, SE, DL); } }; } @@ -1255,7 +1236,7 @@ void IndVarSimplify::SimplifyAndExtend(Loop *L, PHINode *CurrIV = LoopPhis.pop_back_val(); // Information about sign/zero extensions of CurrIV. - IndVarSimplifyVisitor Visitor(CurrIV, SE, DL, TTI, DT); + IndVarSimplifyVisitor Visitor(CurrIV, SE, DL, DT); Changed |= simplifyUsersOfIV(CurrIV, SE, &LPM, DeadInsts, &Visitor); @@ -1914,7 +1895,6 @@ bool IndVarSimplify::runOnLoop(Loop *L, LPPassManager &LPM) { DataLayoutPass *DLP = getAnalysisIfAvailable(); DL = DLP ? &DLP->getDataLayout() : nullptr; TLI = getAnalysisIfAvailable(); - TTI = getAnalysisIfAvailable(); DeadInsts.clear(); Changed = false; diff --git a/test/Transforms/IndVarSimplify/no-widen-expensive.ll b/test/Transforms/IndVarSimplify/no-widen-expensive.ll deleted file mode 100644 index 8744b19d5e2..00000000000 --- a/test/Transforms/IndVarSimplify/no-widen-expensive.ll +++ /dev/null @@ -1,37 +0,0 @@ -; RUN: opt < %s -indvars -S | FileCheck %s - -target triple = "nvptx64-unknown-unknown" - -; For the nvptx64 architecture, the cost of an arithmetic instruction on a -; 64-bit integer is twice as expensive as that on a 32-bit integer, because the -; hardware needs to simulate a 64-bit integer using two 32-bit integers. -; Therefore, in this particular architecture, we should not widen induction -; variables to 64-bit integers even though i64 is a legal type in the 64-bit -; PTX ISA. - -define void @indvar_32_bit(i32 %n, i32* nocapture %output) { -; CHECK-LABEL: @indvar_32_bit -entry: - %cmp5 = icmp sgt i32 %n, 0 - br i1 %cmp5, label %for.body.preheader, label %for.end - -for.body.preheader: ; preds = %entry - br label %for.body - -for.body: ; preds = %for.body.preheader, %for.body - %i.06 = phi i32 [ 0, %for.body.preheader ], [ %add, %for.body ] -; CHECK: phi i32 - %mul = mul nsw i32 %i.06, %i.06 - %0 = sext i32 %i.06 to i64 - %arrayidx = getelementptr inbounds i32* %output, i64 %0 - store i32 %mul, i32* %arrayidx, align 4 - %add = add nsw i32 %i.06, 3 - %cmp = icmp slt i32 %add, %n - br i1 %cmp, label %for.body, label %for.end.loopexit - -for.end.loopexit: ; preds = %for.body - br label %for.end - -for.end: ; preds = %for.end.loopexit, %entry - ret void -}