From: Jim Grosbach Date: Tue, 6 Sep 2011 21:44:58 +0000 (+0000) Subject: Thumb2 parsing and encoding for CMN and CMP. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=ef88a926778b15aa4527a148a514ed0585af7cb1;p=oota-llvm.git Thumb2 parsing and encoding for CMN and CMP. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139188 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index d2ee466d7ae..7aaadef93ab 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -798,7 +798,7 @@ multiclass T2I_sh_ir opcod, string opc, Operand ty, PatFrag opnode, def : t2InstAlias(!strconcat(baseOpc, "ri")) rGPR:$Rd, rGPR:$Rn, ty:$imm, pred:$p, - cc_out:$s)>; + cc_out:$s)>; def : t2InstAlias(!strconcat(baseOpc, "rr")) rGPR:$Rd, rGPR:$Rn, rGPR:$Rm, pred:$p, @@ -818,15 +818,15 @@ multiclass T2I_sh_ir opcod, string opc, Operand ty, PatFrag opnode, /// T2I_cmp_irs - Defines a set of (op r, {so_imm|r|so_reg}) cmp / test /// patterns. Similar to T2I_bin_irs except the instruction does not produce /// a explicit result, only implicitly set CPSR. -let isCompare = 1, Defs = [CPSR] in { multiclass T2I_cmp_irs opcod, string opc, InstrItinClass iii, InstrItinClass iir, InstrItinClass iis, - PatFrag opnode> { + PatFrag opnode, string baseOpc> { +let isCompare = 1, Defs = [CPSR] in { // shifted imm def ri : T2OneRegCmpImm< - (outs), (ins GPR:$Rn, t2_so_imm:$imm), iii, + (outs), (ins GPRnopc:$Rn, t2_so_imm:$imm), iii, opc, ".w\t$Rn, $imm", - [(opnode GPR:$Rn, t2_so_imm:$imm)]> { + [(opnode GPRnopc:$Rn, t2_so_imm:$imm)]> { let Inst{31-27} = 0b11110; let Inst{25} = 0; let Inst{24-21} = opcod; @@ -836,9 +836,9 @@ multiclass T2I_cmp_irs opcod, string opc, } // register def rr : T2TwoRegCmp< - (outs), (ins GPR:$Rn, rGPR:$Rm), iir, + (outs), (ins GPRnopc:$Rn, rGPR:$Rm), iir, opc, ".w\t$Rn, $Rm", - [(opnode GPR:$Rn, rGPR:$Rm)]> { + [(opnode GPRnopc:$Rn, rGPR:$Rm)]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = opcod; @@ -850,9 +850,9 @@ multiclass T2I_cmp_irs opcod, string opc, } // shifted register def rs : T2OneRegCmpShiftedReg< - (outs), (ins GPR:$Rn, t2_so_reg:$ShiftedRm), iis, + (outs), (ins GPRnopc:$Rn, t2_so_reg:$ShiftedRm), iis, opc, ".w\t$Rn, $ShiftedRm", - [(opnode GPR:$Rn, t2_so_reg:$ShiftedRm)]> { + [(opnode GPRnopc:$Rn, t2_so_reg:$ShiftedRm)]> { let Inst{31-27} = 0b11101; let Inst{26-25} = 0b01; let Inst{24-21} = opcod; @@ -860,6 +860,17 @@ multiclass T2I_cmp_irs opcod, string opc, let Inst{11-8} = 0b1111; // Rd } } + + // Assembler aliases w/o the ".w" suffix. + // No alias here for 'rr' version as not all instantiations of this + // multiclass want one (CMP in particular, does not). + def : t2InstAlias(!strconcat(baseOpc, "ri")) GPRnopc:$Rn, + t2_so_imm:$imm, pred:$p)>; + def : t2InstAlias(!strconcat(baseOpc, "rs")) GPRnopc:$Rn, + t2_so_reg:$shift, + pred:$p)>; } /// T2I_ld - Defines a set of (op r, {imm12|imm8|so_reg}) load patterns. @@ -2646,14 +2657,14 @@ def : T2Pat<(or (and rGPR:$src1, 0xFFFF0000), // defm t2CMP : T2I_cmp_irs<0b1101, "cmp", IIC_iCMPi, IIC_iCMPr, IIC_iCMPsi, - BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>>; + BinOpFrag<(ARMcmp node:$LHS, node:$RHS)>, "t2CMP">; -def : T2Pat<(ARMcmpZ GPR:$lhs, t2_so_imm:$imm), - (t2CMPri GPR:$lhs, t2_so_imm:$imm)>; -def : T2Pat<(ARMcmpZ GPR:$lhs, rGPR:$rhs), - (t2CMPrr GPR:$lhs, rGPR:$rhs)>; -def : T2Pat<(ARMcmpZ GPR:$lhs, t2_so_reg:$rhs), - (t2CMPrs GPR:$lhs, t2_so_reg:$rhs)>; +def : T2Pat<(ARMcmpZ GPRnopc:$lhs, t2_so_imm:$imm), + (t2CMPri GPRnopc:$lhs, t2_so_imm:$imm)>; +def : T2Pat<(ARMcmpZ GPRnopc:$lhs, rGPR:$rhs), + (t2CMPrr GPRnopc:$lhs, rGPR:$rhs)>; +def : T2Pat<(ARMcmpZ GPRnopc:$lhs, t2_so_reg:$rhs), + (t2CMPrs GPRnopc:$lhs, t2_so_reg:$rhs)>; //FIXME: Disable CMN, as CCodes are backwards from compare expectations // Compare-to-zero still works out, just not the relationals @@ -2661,20 +2672,23 @@ def : T2Pat<(ARMcmpZ GPR:$lhs, t2_so_reg:$rhs), // BinOpFrag<(ARMcmp node:$LHS,(ineg node:$RHS))>>; defm t2CMNz : T2I_cmp_irs<0b1000, "cmn", IIC_iCMPi, IIC_iCMPr, IIC_iCMPsi, - BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>>; + BinOpFrag<(ARMcmpZ node:$LHS,(ineg node:$RHS))>, + "t2CMNz">; //def : T2Pat<(ARMcmp GPR:$src, t2_so_imm_neg:$imm), // (t2CMNri GPR:$src, t2_so_imm_neg:$imm)>; -def : T2Pat<(ARMcmpZ GPR:$src, t2_so_imm_neg:$imm), - (t2CMNzri GPR:$src, t2_so_imm_neg:$imm)>; +def : T2Pat<(ARMcmpZ GPRnopc:$src, t2_so_imm_neg:$imm), + (t2CMNzri GPRnopc:$src, t2_so_imm_neg:$imm)>; defm t2TST : T2I_cmp_irs<0b0000, "tst", IIC_iTSTi, IIC_iTSTr, IIC_iTSTsi, - BinOpFrag<(ARMcmpZ (and_su node:$LHS, node:$RHS), 0)>>; + BinOpFrag<(ARMcmpZ (and_su node:$LHS, node:$RHS), 0)>, + "t2TST">; defm t2TEQ : T2I_cmp_irs<0b0100, "teq", IIC_iTSTi, IIC_iTSTr, IIC_iTSTsi, - BinOpFrag<(ARMcmpZ (xor_su node:$LHS, node:$RHS), 0)>>; + BinOpFrag<(ARMcmpZ (xor_su node:$LHS, node:$RHS), 0)>, + "t2TEQ">; // Conditional moves // FIXME: should be able to write a pattern for ARMcmov, but can't use @@ -3567,3 +3581,12 @@ def : t2InstAlias<"add${s}${p} $Rd, $Rn, $Rm", def : t2InstAlias<"add${s}${p} $Rd, $Rn, $ShiftedRm", (t2ADDrs rGPR:$Rd, GPRnopc:$Rn, t2_so_reg:$ShiftedRm, pred:$p, cc_out:$s)>; + +// Alias for compares without the ".w" optional width specifier. +def : t2InstAlias<"cmn${p} $Rn, $Rm", + (t2CMNzrr GPRnopc:$Rn, rGPR:$Rm, pred:$p)>; +def : t2InstAlias<"teq${p} $Rn, $Rm", + (t2TEQrr GPRnopc:$Rn, rGPR:$Rm, pred:$p)>; +def : t2InstAlias<"tst${p} $Rn, $Rm", + (t2TSTrr GPRnopc:$Rn, rGPR:$Rm, pred:$p)>; + diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 1946f5f7db3..c9a9a112174 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -316,6 +316,46 @@ _func: @ CHECK: clzeq r1, r2 @ encoding: [0xb2,0xfa,0x82,0xf1] +@------------------------------------------------------------------------------ +@ CMN +@------------------------------------------------------------------------------ + cmn r1, #0xf + cmn r8, r6 + cmn r1, r6, lsl #10 + cmn r1, r6, lsr #10 + cmn sp, r6, lsr #10 + cmn r1, r6, asr #10 + cmn r1, r6, ror #10 + +@ CHECK: cmn.w r1, #15 @ encoding: [0x11,0xf1,0x0f,0x0f] +@ CHECK: cmn.w r8, r6 @ encoding: [0x18,0xeb,0x06,0x0f] +@ CHECK: cmn.w r1, r6, lsl #10 @ encoding: [0x11,0xeb,0x86,0x2f] +@ CHECK: cmn.w r1, r6, lsr #10 @ encoding: [0x11,0xeb,0x96,0x2f] +@ CHECK: cmn.w sp, r6, lsr #10 @ encoding: [0x1d,0xeb,0x96,0x2f] +@ CHECK: cmn.w r1, r6, asr #10 @ encoding: [0x11,0xeb,0xa6,0x2f] +@ CHECK: cmn.w r1, r6, ror #10 @ encoding: [0x11,0xeb,0xb6,0x2f] + + +@------------------------------------------------------------------------------ +@ CMP +@------------------------------------------------------------------------------ + cmp r5, #0xff00 + cmp.w r4, r12 + cmp r9, r6, lsl #12 + cmp r3, r7, lsr #31 + cmp sp, r6, lsr #1 + cmp r2, r5, asr #24 + cmp r1, r4, ror #15 + +@ CHECK: cmp.w r5, #65280 @ encoding: [0xb5,0xf5,0x7f,0x4f] +@ CHECK: cmp.w r4, r12 @ encoding: [0xb4,0xeb,0x0c,0x0f] +@ CHECK: cmp.w r9, r6, lsl #12 @ encoding: [0xb9,0xeb,0x06,0x3f] +@ CHECK: cmp.w r3, r7, lsr #31 @ encoding: [0xb3,0xeb,0xd7,0x7f] +@ CHECK: cmp.w sp, r6, lsr #1 @ encoding: [0xbd,0xeb,0x56,0x0f] +@ CHECK: cmp.w r2, r5, asr #24 @ encoding: [0xb2,0xeb,0x25,0x6f] +@ CHECK: cmp.w r1, r4, ror #15 @ encoding: [0xb1,0xeb,0xf4,0x3f] + + @------------------------------------------------------------------------------ @ IT @------------------------------------------------------------------------------