From: Alkis Evlogimenos <alkis@evlogimenos.com>
Date: Wed, 4 Feb 2004 17:21:04 +0000 (+0000)
Subject: IMULri* instructions do not require their first two registers operands
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f0339396c1433d4995102f1963c9e5e3ecb60c45;p=oota-llvm.git

IMULri* instructions do not require their first two registers operands
to be the same (IOW they are not two address instructions).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11117 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index 5ac5c78f5c5..7cd4573ff66 100644
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -666,8 +666,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     // ModR/M input.  The first two operands should be the same, post register
     // allocation.  This is for things like: add r32, r/m32
     //
-    // 3 Operands: in this form, we can have 'INST R, R, imm', which is used for
-    // instructions like the IMULri instructions.
+    // 3 Operands: in this form, we can have 'INST R1, R2, imm', which is used
+    // for instructions like the IMULri instructions.
     //
     // 2 Operands: this is for things like mov that do not read a second input
     //
@@ -678,7 +678,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
              (MI->getOperand(2).isRegister() ||
               MI->getOperand(2).isImmediate())))
            && "Bad format for MRMSrcReg!");
-    if (MI->getNumOperands() == 3 &&
+    if (MI->getNumOperands() == 3 && !MI->getOperand(2).isImmediate() &&
         MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
       O << "**";
 
diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index 5ac5c78f5c5..7cd4573ff66 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -666,8 +666,8 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
     // ModR/M input.  The first two operands should be the same, post register
     // allocation.  This is for things like: add r32, r/m32
     //
-    // 3 Operands: in this form, we can have 'INST R, R, imm', which is used for
-    // instructions like the IMULri instructions.
+    // 3 Operands: in this form, we can have 'INST R1, R2, imm', which is used
+    // for instructions like the IMULri instructions.
     //
     // 2 Operands: this is for things like mov that do not read a second input
     //
@@ -678,7 +678,7 @@ void Printer::printMachineInstruction(const MachineInstr *MI) {
              (MI->getOperand(2).isRegister() ||
               MI->getOperand(2).isImmediate())))
            && "Bad format for MRMSrcReg!");
-    if (MI->getNumOperands() == 3 &&
+    if (MI->getNumOperands() == 3 && !MI->getOperand(2).isImmediate() &&
         MI->getOperand(0).getReg() != MI->getOperand(1).getReg())
       O << "**";
 
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index ce6dd96d4e3..92f193f9850 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -270,10 +270,12 @@ def SBBrr32  : I2A32<"sbb", 0x19, MRMDestReg>;                // R32 -= R32+Carr
 
 def IMULrr16 : I2A16<"imul", 0xAF, MRMSrcReg>, TB, OpSize, Pattern<(set R16, (times R16, R16))>;
 def IMULrr32 : I2A32<"imul", 0xAF, MRMSrcReg>, TB        , Pattern<(set R32, (times R32, R32))>;
-def IMULri16 : I2A16<"imul", 0x69, MRMSrcReg>,     OpSize;
-def IMULri32 : I2A32<"imul", 0x69, MRMSrcReg>;
-def IMULri16b : I2A8<"imul", 0x6B, MRMSrcReg>,     OpSize;
-def IMULri32b : I2A8<"imul", 0x6B, MRMSrcReg>;
+
+// These are suprisingly enough not two addres instructions!
+def IMULri16 : X86Inst<"imul", 0x69, MRMSrcReg, Arg16>,     OpSize;
+def IMULri32 : X86Inst<"imul", 0x69, MRMSrcReg, Arg32>;
+def IMULri16b : X86Inst<"imul", 0x6B, MRMSrcReg, Arg8>,     OpSize;
+def IMULri32b : X86Inst<"imul", 0x6B, MRMSrcReg, Arg8>;
 
 
 // Logical operators...