From: Iliyan Malchev <malchev@google.com>
Date: Thu, 21 Oct 2010 23:48:37 +0000 (-0700)
Subject: [ARM] tegra: dma: expose TEGRA_DMA_MAX_TRANSFER_SIZE, fix typo
X-Git-Tag: firefly_0821_release~9833^2~140^2~6
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f18c9f31a0d25535c13f0b663fedeb253370b72d;p=firefly-linux-kernel-4.4.55.git

[ARM] tegra: dma: expose TEGRA_DMA_MAX_TRANSFER_SIZE, fix typo

NV_DMA_MAX_TRASFER_SIZE --> TEGRA_DMA_MAX_TRANSFER_SIZE

Signed-off-by: Iliyan Malchev <malchev@google.com>
---

diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c
index 8da59aa855ff..ffba4441a99b 100644
--- a/arch/arm/mach-tegra/dma.c
+++ b/arch/arm/mach-tegra/dma.c
@@ -101,8 +101,6 @@
 #define TEGRA_SYSTEM_DMA_CH_MAX	\
 	(TEGRA_SYSTEM_DMA_CH_NR - TEGRA_SYSTEM_DMA_AVP_CH_NUM - 1)
 
-#define NV_DMA_MAX_TRASFER_SIZE 0x10000
-
 const unsigned int ahb_addr_wrap_table[8] = {
 	0, 32, 64, 128, 256, 512, 1024, 2048
 };
@@ -326,7 +324,7 @@ int tegra_dma_enqueue_req(struct tegra_dma_channel *ch,
 	unsigned long irq_flags;
 	int start_dma = 0;
 
-	if (req->size > NV_DMA_MAX_TRASFER_SIZE ||
+	if (req->size > TEGRA_DMA_MAX_TRANSFER_SIZE ||
 		req->source_addr & 0x3 || req->dest_addr & 0x3) {
 		pr_err("Invalid DMA request for channel %d\n", ch->id);
 		return -EINVAL;
diff --git a/arch/arm/mach-tegra/include/mach/dma.h b/arch/arm/mach-tegra/include/mach/dma.h
index 81e62782bac7..243050693eec 100644
--- a/arch/arm/mach-tegra/include/mach/dma.h
+++ b/arch/arm/mach-tegra/include/mach/dma.h
@@ -56,6 +56,8 @@ struct tegra_dma_channel;
 #define TEGRA_DMA_REQ_SEL_OWR			25
 #define TEGRA_DMA_REQ_SEL_INVALID		31
 
+#define TEGRA_DMA_MAX_TRANSFER_SIZE		0x10000
+
 enum tegra_dma_mode {
 	TEGRA_DMA_SHARED = 1,
 	TEGRA_DMA_MODE_CONTINUOUS = 2,