From: Oleg Ranevskyy Date: Fri, 23 Oct 2015 17:17:59 +0000 (+0000) Subject: [ARM CodeGen] @llvm.debugtrap call may be removed when restoring callee saved registers X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f1c16763a7b32c3187c7d8fd03c4eb501586924c;p=oota-llvm.git [ARM CodeGen] @llvm.debugtrap call may be removed when restoring callee saved registers Summary: When ARMFrameLowering::emitPopInst generates a "pop" instruction to restore the callee saved registers, it checks if the LR register is among them. If so, the function may decide to remove the basic block's terminator and replace it with a "pop" to the PC register instead of LR. This leads to a problem when the block's terminator is preceded by a "llvm.debugtrap" call. The MI iterator points to the trap in such a case, which is also a terminator. If the function decides to restore LR to PC, it erroneously removes the trap. Reviewers: asl, rengolin Subscribers: aemerson, jfb, rengolin, dschuff, llvm-commits Differential Revision: http://reviews.llvm.org/D13672 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251123 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMFrameLowering.cpp b/lib/Target/ARM/ARMFrameLowering.cpp index d6542637c3b..28e866e8cb3 100644 --- a/lib/Target/ARM/ARMFrameLowering.cpp +++ b/lib/Target/ARM/ARMFrameLowering.cpp @@ -968,12 +968,16 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB, DebugLoc DL; bool isTailCall = false; bool isInterrupt = false; + bool isTrap = false; if (MBB.end() != MI) { DL = MI->getDebugLoc(); unsigned RetOpcode = MI->getOpcode(); isTailCall = (RetOpcode == ARM::TCRETURNdi || RetOpcode == ARM::TCRETURNri); isInterrupt = RetOpcode == ARM::SUBS_PC_LR || RetOpcode == ARM::t2SUBS_PC_LR; + isTrap = + RetOpcode == ARM::TRAP || RetOpcode == ARM::TRAPNaCl || + RetOpcode == ARM::tTRAP; } SmallVector Regs; @@ -990,7 +994,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB, continue; if (Reg == ARM::LR && !isTailCall && !isVarArg && !isInterrupt && - STI.hasV5TOps()) { + !isTrap && STI.hasV5TOps()) { if (MBB.succ_empty()) { Reg = ARM::PC; DeleteRet = true; diff --git a/test/CodeGen/ARM/debugtrap.ll b/test/CodeGen/ARM/debugtrap.ll new file mode 100644 index 00000000000..9ce73939ce5 --- /dev/null +++ b/test/CodeGen/ARM/debugtrap.ll @@ -0,0 +1,17 @@ +; This test ensures the @llvm.debugtrap() call is not removed when generating +; the 'pop' instruction to restore the callee saved registers on ARM. + +; RUN: llc < %s -mtriple=armv7 -O0 -filetype=asm | FileCheck %s + +declare void @llvm.debugtrap() nounwind +declare void @foo() nounwind + +define void @test() nounwind { +entry: + ; CHECK: bl foo + ; CHECK-NEXT: pop + ; CHECK-NEXT: trap + call void @foo() + call void @llvm.debugtrap() + ret void +}