From: Zheng Yang <zhengyang@rock-chips.com>
Date: Fri, 10 Jul 2015 03:33:57 +0000 (+0800)
Subject:  hdmi:rk3368/rk3288: modify phy termination resistance.
X-Git-Tag: firefly_0821_release~3932
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f1d8317f7f90edf4ab258998bdc45c17f1b3b631;p=firefly-linux-kernel-4.4.55.git

 hdmi:rk3368/rk3288: modify phy termination resistance.

        Set single-ended source termination resistance
        to 100ohm for HDMI1.4 and 50ohm for HDMI2.0.

Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
---

diff --git a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
index 4106858b6b2d..ef98b201b3b3 100755
--- a/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
+++ b/drivers/video/rockchip/hdmi/rockchip-hdmiv2/rockchip_hdmiv2_hw.c
@@ -462,23 +462,30 @@ static int rockchip_hdmiv2_config_phy(struct hdmi_dev *hdmi_dev)
 					  v_MPLL_GMP_CNTRL(
 					  phy_mpll->gmp_cntrl));
 	}
-	rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
-				  v_TX_TERM(R50_OHMS));
+
 	rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_CLKSYMCTRL,
 				  v_OVERRIDE(1) | v_SLOPEBOOST(0) |
 				  v_TX_SYMON(1) | v_TX_TRAON(0) |
 				  v_TX_TRBON(0) | v_CLK_SYMON(1));
-	if (hdmi_dev->tmdsclk > 340000000)
-		rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
-					  v_SUP_TXLVL(9) | v_SUP_CLKLVL(17));
-	else if (hdmi_dev->tmdsclk > 165000000)
-		rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
-					  v_SUP_TXLVL(14) | v_SUP_CLKLVL(17));
-	else
+	if (hdmi_dev->tmdsclk > 340000000) {
+		rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
+					  v_TX_TERM(R50_OHMS));
 		rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
-					  v_SUP_TXLVL(18) | v_SUP_CLKLVL(17));
-
-	rockchip_hdmiv2_write_phy(hdmi_dev, 0x05, 0x8000);
+					  v_SUP_TXLVL(9) |
+					  v_SUP_CLKLVL(17));
+	} else {
+		rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_TERM_RESIS,
+					  v_TX_TERM(R100_OHMS));
+		if (hdmi_dev->tmdsclk > 165000000)
+			rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
+						  v_SUP_TXLVL(14) |
+						  v_SUP_CLKLVL(17));
+		else
+			rockchip_hdmiv2_write_phy(hdmi_dev, PHYTX_VLEVCTRL,
+						  v_SUP_TXLVL(18) |
+						  v_SUP_CLKLVL(17));
+	}
+	/* rockchip_hdmiv2_write_phy(hdmi_dev, 0x05, 0x8000); */
 	if (hdmi_dev->tmdsclk_ratio_change)
 		msleep(100);
 	/* power on PHY */