From: Wu Zhangjin <wuzj@lemote.com>
Date: Thu, 2 Jul 2009 15:20:20 +0000 (+0800)
Subject: MIPS: Loongson: Add new early_printk implmentation
X-Git-Tag: firefly_0821_release~12938^2~35
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f6a2740d0c1b3fd0d3cc8ec17e232f82f2d8b14c;p=firefly-linux-kernel-4.4.55.git

MIPS: Loongson: Add new early_printk implmentation

This patch is based on the implementation in the lm2e-fixes branch of
Philippe's git://git.linux-cisco.org/linux-mips.git and the
malta-specific early_printk implementation.

Signed-off-by: Wu Zhangjin <wuzj@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
---

diff --git a/arch/mips/lemote/lm2e/Makefile b/arch/mips/lemote/lm2e/Makefile
index b0c03390241d..f19173252d6a 100644
--- a/arch/mips/lemote/lm2e/Makefile
+++ b/arch/mips/lemote/lm2e/Makefile
@@ -4,4 +4,9 @@
 
 obj-y += setup.o prom.o reset.o irq.o pci.o bonito-irq.o mem.o
 
+#
+# Early printk support
+#
+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
 EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/lemote/lm2e/early_printk.c b/arch/mips/lemote/lm2e/early_printk.c
new file mode 100644
index 000000000000..811c7dec1edd
--- /dev/null
+++ b/arch/mips/lemote/lm2e/early_printk.c
@@ -0,0 +1,41 @@
+/*  early printk support
+ *
+ *  Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca>
+ *  Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology
+ *  Author: Wu Zhangjin, wuzj@lemote.com
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ */
+#include <linux/io.h>
+#include <linux/init.h>
+#include <linux/serial_reg.h>
+
+#include <asm/mips-boards/bonito64.h>
+
+#define UART_BASE (BONITO_PCIIO_BASE + 0x3f8)
+
+#define PORT(base, offset) (u8 *)(base + offset)
+
+static inline unsigned int serial_in(phys_addr_t base, int offset)
+{
+	return readb(PORT(base, offset));
+}
+
+static inline void serial_out(phys_addr_t base, int offset, int value)
+{
+	writeb(value, PORT(base, offset));
+}
+
+void prom_putchar(char c)
+{
+	phys_addr_t uart_base =
+		(phys_addr_t) ioremap_nocache(UART_BASE, 8);
+
+	while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0)
+		;
+
+	serial_out(uart_base, UART_TX, c);
+}