From: Toma Tabacu Date: Wed, 8 Apr 2015 12:15:05 +0000 (+0000) Subject: [mips] [IAS] Add support for the BNEZL and BEQZL pseudo-instructions. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f716ca43caf2d4be7ab2411bd5f0305190fdf8f3;p=oota-llvm.git [mips] [IAS] Add support for the BNEZL and BEQZL pseudo-instructions. Summary: They are of the form "bnezl/beqzl $rs, offset" and expand to "bnel/beql $rs, $zero, offset". These instructions are used in Linux inline assembly. Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8540 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234401 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index b13d372660b..a1fad663b1c 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -1594,8 +1594,12 @@ def : MipsInstAlias<"b $offset", (BEQ ZERO, ZERO, brtarget:$offset), 0>; } def : MipsInstAlias<"bnez $rs,$offset", (BNE GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>; +def : MipsInstAlias<"bnezl $rs,$offset", + (BNEL GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>; def : MipsInstAlias<"beqz $rs,$offset", (BEQ GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>; +def : MipsInstAlias<"beqzl $rs,$offset", + (BEQL GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>; def : MipsInstAlias<"syscall", (SYSCALL 0), 1>; def : MipsInstAlias<"break", (BREAK 0, 0), 1>; diff --git a/test/MC/Mips/mips-jump-delay-slots.s b/test/MC/Mips/mips-jump-delay-slots.s index 49f6c159b68..c52416fe156 100644 --- a/test/MC/Mips/mips-jump-delay-slots.s +++ b/test/MC/Mips/mips-jump-delay-slots.s @@ -68,9 +68,15 @@ # CHECK: beql $9, $6, 1332 # CHECK-NOT: nop beql $9,$6,1332 + # CHECK: beql $9, $zero, 1332 + # CHECK-NOT: nop + beqzl $9,1332 # CHECK: bnel $9, $6, 1332 # CHECK-NOT: nop bnel $9,$6,1332 + # CHECK: bnel $9, $zero, 1332 + # CHECK-NOT: nop + bnezl $9,1332 # CHECK: bgezl $6, 1332 # CHECK-NOT: nop bgezl $6,1332