From: 黄涛 Date: Thu, 5 Jul 2012 09:16:55 +0000 (+0800) Subject: rk: move fiq.c from mach-rk30 to plat-rk X-Git-Tag: firefly_0821_release~9043 X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f8dbfea94533910379cee0e6c9185af2e2c7937d;p=firefly-linux-kernel-4.4.55.git rk: move fiq.c from mach-rk30 to plat-rk add GIC_DIST_BASE, GIC_CPU_BASE, IRQ_DEBUG_UART macro rename rk30_fiq_init to rk_fiq_init --- diff --git a/arch/arm/mach-rk30/Makefile b/arch/arm/mach-rk30/Makefile index eb2659740272..e240e14532d7 100755 --- a/arch/arm/mach-rk30/Makefile +++ b/arch/arm/mach-rk30/Makefile @@ -10,7 +10,6 @@ obj-y += pmu.o obj-y += reset.o obj-y += timer.o obj-y += tsadc.o -obj-$(CONFIG_FIQ) += fiq.o obj-$(CONFIG_SMP) += platsmp.o headsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o diff --git a/arch/arm/mach-rk30/common.c b/arch/arm/mach-rk30/common.c index 40bcadebee6d..1a3050139400 100755 --- a/arch/arm/mach-rk30/common.c +++ b/arch/arm/mach-rk30/common.c @@ -119,7 +119,7 @@ void __init rk30_init_irq(void) { gic_init(0, IRQ_LOCALTIMER, RK30_GICD_BASE, RK30_GICC_BASE); #ifdef CONFIG_FIQ - rk30_fiq_init(); + rk_fiq_init(); #endif rk30_gpio_init(); } diff --git a/arch/arm/mach-rk30/devices.c b/arch/arm/mach-rk30/devices.c index 852ded9a79aa..2a9838aa123b 100755 --- a/arch/arm/mach-rk30/devices.c +++ b/arch/arm/mach-rk30/devices.c @@ -1164,7 +1164,7 @@ static int __init rk30_init_devices(void) platform_device_register(&device_tsadc); rk30_init_sdmmc(); #if defined(CONFIG_FIQ_DEBUGGER) && defined(DEBUG_UART_PHYS) - rk_serial_debug_init(DEBUG_UART_BASE, IRQ_UART0 + CONFIG_RK_DEBUG_UART, IRQ_UART_SIGNAL, -1); + rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1); #endif rk30_init_i2s(); #ifdef CONFIG_RK29_VMAC diff --git a/arch/arm/mach-rk30/fiq.c b/arch/arm/mach-rk30/fiq.c deleted file mode 100644 index 4883d4b7a6bb..000000000000 --- a/arch/arm/mach-rk30/fiq.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (C) 2010 Google, Inc. - * - * Author: - * Brian Swetland - * Iliyan Malchev - * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - - -// GIC ICDISR -#define GIC_DIST_SECURITY 0x080 - -#define FIRST_SGI_PPI_IRQ 32 - -static void rk30_fiq_mask(struct irq_data *d) -{ - u32 i = 0; - void __iomem *base = RK30_GICD_BASE; - - if (d->irq < FIRST_SGI_PPI_IRQ) - return; - // ICDISR each bit 0 -- Secure 1--Non-Secure - // FIQ output from secure , so set bit Non-Secure to mask the fiq - base += GIC_DIST_SECURITY + ((d->irq / 32) << 2); - i = readl_relaxed(base); - i |= 1 << (d->irq % 32); - writel_relaxed(i, base); - dsb(); -} - -static void rk30_fiq_unmask(struct irq_data *d) -{ - u32 i = 0; - void __iomem *base = RK30_GICD_BASE; - - if (d->irq < FIRST_SGI_PPI_IRQ) - return; - // ICDISR each bit 0 -- Secure 1--Non-Secure - // FIQ output from secure , so set bit Secure to unmask the fiq - base += GIC_DIST_SECURITY + ((d->irq / 32) << 2); - i = readl_relaxed(base); - i &= ~(1 << (d->irq % 32)); - writel_relaxed(i, base); - dsb(); -} - -void rk_fiq_enable(int irq) -{ - rk30_fiq_unmask(irq_get_irq_data(irq)); - enable_fiq(irq); -} - -void rk_fiq_disable(int irq) -{ - rk30_fiq_mask(irq_get_irq_data(irq)); - disable_fiq(irq); -} - -void rk_irq_setpending(int irq) -{ - writel_relaxed(1<<(irq%32), RK30_GICD_BASE + GIC_DIST_PENDING_SET + (irq/32)*4); - dsb(); -} - -void rk_irq_clearpending(int irq) -{ - writel_relaxed(1<<(irq%32), RK30_GICD_BASE + GIC_DIST_PENDING_CLEAR + (irq/32)*4); - dsb(); -} - -void rk30_fiq_init(void) -{ - unsigned int gic_irqs, i; - - // read gic info to know how many irqs in our chip - gic_irqs = readl_relaxed(RK30_GICD_BASE + GIC_DIST_CTR) & 0x1f; - // set all the interrupt to non-secure state - for (i = 0; i < (gic_irqs + 1); i++) { - writel_relaxed(0xffffffff, RK30_GICD_BASE + GIC_DIST_SECURITY + (i<<2)); - } - dsb(); - writel_relaxed(0x3, RK30_GICD_BASE + GIC_DIST_CTRL); - writel_relaxed(0x0f, RK30_GICC_BASE + GIC_CPU_CTRL); - //set the uart 2(the debug port) priority a little higher than other interrupts - writel_relaxed(0xa0a0a090, RK30_GICD_BASE + GIC_DIST_PRI + (IRQ_UART2/4)*4); - dsb(); -} diff --git a/arch/arm/mach-rk30/include/mach/fiq.h b/arch/arm/mach-rk30/include/mach/fiq.h index fc0aaa6b5c7e..31e146e6f1f4 100644 --- a/arch/arm/mach-rk30/include/mach/fiq.h +++ b/arch/arm/mach-rk30/include/mach/fiq.h @@ -1,8 +1 @@ -#ifndef __ASM_ARCH_RK30_FIQ_H -#define __ASM_ARCH_RK30_FIQ_H - #include - -void rk30_fiq_init(void); - -#endif diff --git a/arch/arm/mach-rk30/include/mach/io.h b/arch/arm/mach-rk30/include/mach/io.h index c50f9dec074d..062123b5fcf4 100644 --- a/arch/arm/mach-rk30/include/mach/io.h +++ b/arch/arm/mach-rk30/include/mach/io.h @@ -228,4 +228,7 @@ #define DEBUG_UART_BASE RK30_UART3_BASE #endif +#define GIC_DIST_BASE RK30_GICD_BASE +#define GIC_CPU_BASE RK30_GICC_BASE + #endif diff --git a/arch/arm/mach-rk30/include/mach/irqs.h b/arch/arm/mach-rk30/include/mach/irqs.h index 0606eeed97e5..636752bc1ed0 100644 --- a/arch/arm/mach-rk30/include/mach/irqs.h +++ b/arch/arm/mach-rk30/include/mach/irqs.h @@ -86,6 +86,9 @@ //hhb@rock-chips.com this spi is used for fiq_debugger signal irq #define IRQ_UART_SIGNAL RK30XX_IRQ(80) +#if CONFIG_RK_DEBUG_UART >= 0 && CONFIG_RK_DEBUG_UART < 4 +#define IRQ_DEBUG_UART (IRQ_UART0 + CONFIG_RK_DEBUG_UART) +#endif #define NR_GIC_IRQS (5 * 32) #define NR_GPIO_IRQS (6 * 32) diff --git a/arch/arm/plat-rk/Makefile b/arch/arm/plat-rk/Makefile index 67dc1973eee4..1fd707849d73 100644 --- a/arch/arm/plat-rk/Makefile +++ b/arch/arm/plat-rk/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_RK29_LAST_LOG) += last_log.o obj-$(CONFIG_USB_GADGET) += usb_detect.o obj-$(CONFIG_RK29_VPU) += vpu_service.o obj-$(CONFIG_ARCH_RK30) += dma-pl330.o +obj-$(CONFIG_FIQ) += fiq.o obj-$(CONFIG_FIQ_DEBUGGER) += rk_fiq_debugger.o obj-$(CONFIG_RK_EARLY_PRINTK) += early_printk.o ../kernel/debug.o obj-y += mem_reserve.o diff --git a/arch/arm/plat-rk/fiq.c b/arch/arm/plat-rk/fiq.c new file mode 100644 index 000000000000..23d7599612c5 --- /dev/null +++ b/arch/arm/plat-rk/fiq.c @@ -0,0 +1,111 @@ +/* + * Copyright (C) 2010 Google, Inc. + * + * Author: + * Brian Swetland + * Iliyan Malchev + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + + +// GIC ICDISR +#define GIC_DIST_SECURITY 0x080 + +#define FIRST_SGI_PPI_IRQ 32 + +static void rk_fiq_mask(struct irq_data *d) +{ + u32 i = 0; + void __iomem *base = GIC_DIST_BASE; + + if (d->irq < FIRST_SGI_PPI_IRQ) + return; + // ICDISR each bit 0 -- Secure 1--Non-Secure + // FIQ output from secure , so set bit Non-Secure to mask the fiq + base += GIC_DIST_SECURITY + ((d->irq / 32) << 2); + i = readl_relaxed(base); + i |= 1 << (d->irq % 32); + writel_relaxed(i, base); + dsb(); +} + +static void rk_fiq_unmask(struct irq_data *d) +{ + u32 i = 0; + void __iomem *base = GIC_DIST_BASE; + + if (d->irq < FIRST_SGI_PPI_IRQ) + return; + // ICDISR each bit 0 -- Secure 1--Non-Secure + // FIQ output from secure , so set bit Secure to unmask the fiq + base += GIC_DIST_SECURITY + ((d->irq / 32) << 2); + i = readl_relaxed(base); + i &= ~(1 << (d->irq % 32)); + writel_relaxed(i, base); + dsb(); +} + +void rk_fiq_enable(int irq) +{ + rk_fiq_unmask(irq_get_irq_data(irq)); + enable_fiq(irq); +} + +void rk_fiq_disable(int irq) +{ + rk_fiq_mask(irq_get_irq_data(irq)); + disable_fiq(irq); +} + +void rk_irq_setpending(int irq) +{ + writel_relaxed(1<<(irq%32), GIC_DIST_BASE + GIC_DIST_PENDING_SET + (irq/32)*4); + dsb(); +} + +void rk_irq_clearpending(int irq) +{ + writel_relaxed(1<<(irq%32), GIC_DIST_BASE + GIC_DIST_PENDING_CLEAR + (irq/32)*4); + dsb(); +} + +void rk_fiq_init(void) +{ + unsigned int gic_irqs, i; + + // read gic info to know how many irqs in our chip + gic_irqs = readl_relaxed(GIC_DIST_BASE + GIC_DIST_CTR) & 0x1f; + // set all the interrupt to non-secure state + for (i = 0; i < (gic_irqs + 1); i++) { + writel_relaxed(0xffffffff, GIC_DIST_BASE + GIC_DIST_SECURITY + (i<<2)); + } + dsb(); + writel_relaxed(0x3, GIC_DIST_BASE + GIC_DIST_CTRL); + writel_relaxed(0x0f, GIC_CPU_BASE + GIC_CPU_CTRL); +#ifdef IRQ_DEBUG_UART + // set the debug uart priority a little higher than other interrupts (normal is 0xa0) + writeb_relaxed(0x90, GIC_DIST_BASE + GIC_DIST_PRI + IRQ_DEBUG_UART); +#endif + dsb(); +} diff --git a/arch/arm/plat-rk/include/plat/fiq.h b/arch/arm/plat-rk/include/plat/fiq.h index 9c9261a2b2fa..98e4ff9cf18e 100644 --- a/arch/arm/plat-rk/include/plat/fiq.h +++ b/arch/arm/plat-rk/include/plat/fiq.h @@ -6,5 +6,6 @@ void rk_fiq_enable(int n); void rk_fiq_disable(int n); void rk_irq_setpending(int irq); void rk_irq_clearpending(int irq); +void rk_fiq_init(void); #endif