From: Wu Liang feng <wulf@rock-chips.com>
Date: Sun, 5 Jun 2016 13:16:22 +0000 (+0800)
Subject: ARM64: dts: rk3399: add reg address for dwc3
X-Git-Tag: firefly_0821_release~2514
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=f9f19c1066ed7ad97e5501b7a6ed9ee3dee9f857;p=firefly-linux-kernel-4.4.55.git

ARM64: dts: rk3399: add reg address for dwc3

This patch doesn't fix any issue, but conforms
to linux coding style.

Change-Id: I87326a21594b905ea5791f73efc1cea0299abe4d
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
---

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index e206e3cbf3c7..f2ea44088cbc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -429,7 +429,7 @@
 		#size-cells = <2>;
 		ranges;
 		status = "disabled";
-		usbdrd_dwc3_0: dwc3 {
+		usbdrd_dwc3_0: dwc3@fe800000 {
 			compatible = "snps,dwc3";
 			reg = <0x0 0xfe800000 0x0 0x100000>;
 			interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
@@ -455,7 +455,7 @@
 		#size-cells = <2>;
 		ranges;
 		status = "disabled";
-		usbdrd_dwc3_1: dwc3 {
+		usbdrd_dwc3_1: dwc3@fe900000 {
 			compatible = "snps,dwc3";
 			reg = <0x0 0xfe900000 0x0 0x100000>;
 			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;