From: Andrew Lenharth Date: Sun, 9 Oct 2005 20:11:35 +0000 (+0000) Subject: This seems useful from the original patch that added the function. If there is a... X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=fa08fb2c782bb8c79b8b1503996d1193a772fcdb;p=oota-llvm.git This seems useful from the original patch that added the function. If there is a reason it is not useful on a RISC type target, let me know and I will pull it out git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Alpha/AlphaRegisterInfo.cpp b/lib/Target/Alpha/AlphaRegisterInfo.cpp index ac7d3f146f8..c348fa9ce46 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.cpp +++ b/lib/Target/Alpha/AlphaRegisterInfo.cpp @@ -107,6 +107,25 @@ AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, abort(); } +unsigned +AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const +{ + switch (MI->getOpcode()) { + case Alpha::LDL: + case Alpha::LDQ: + case Alpha::LDBU: + case Alpha::LDWU: + case Alpha::LDS: + case Alpha::LDT: + if (MI->getOperand(1).isFrameIndex()) { + FrameIndex = MI->getOperand(1).getFrameIndex(); + return MI->getOperand(0).getReg(); + } + break; + } + return 0; +} + void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/Alpha/AlphaRegisterInfo.h b/lib/Target/Alpha/AlphaRegisterInfo.h index 0d8c24a50e7..8be85cc7c69 100644 --- a/lib/Target/Alpha/AlphaRegisterInfo.h +++ b/lib/Target/Alpha/AlphaRegisterInfo.h @@ -34,6 +34,8 @@ struct AlphaRegisterInfo : public AlphaGenRegisterInfo { MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC) const; + + virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, unsigned SrcReg,