From: Matthias Braun Date: Mon, 1 Jun 2015 21:26:26 +0000 (+0000) Subject: LiveRangeEdit: Fix liveranges not shrinking on subrange kill. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=fa2b7e5cb4043082b4f5c0d5268803e8af39d007;p=oota-llvm.git LiveRangeEdit: Fix liveranges not shrinking on subrange kill. If a dead instruction we may not only have a last-use in the main live range but also in a subregister range if subregisters are tracked. We need to partially rebuild live ranges in both cases. The testcase only broke when subregister liveness was enabled. I commited it in the current form because there is currently no flag to enable/disable subregister liveness. This fixes PR23720. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238785 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/CodeGen/LiveRangeEdit.h b/include/llvm/CodeGen/LiveRangeEdit.h index de855f2fe7a..c97c636abbb 100644 --- a/include/llvm/CodeGen/LiveRangeEdit.h +++ b/include/llvm/CodeGen/LiveRangeEdit.h @@ -102,6 +102,10 @@ private: /// registers are created. void MRI_NoteNewVirtualRegister(unsigned VReg) override; + /// \brief Check if MachineOperand \p MO is a last use/kill either in the + /// main live range of \p LI or in one of the matching subregister ranges. + bool useIsKill(const LiveInterval &LI, const MachineOperand &MO) const; + public: /// Create a LiveRangeEdit for breaking down parent into smaller pieces. /// @param parent The register being spilled or split. diff --git a/lib/CodeGen/LiveRangeEdit.cpp b/lib/CodeGen/LiveRangeEdit.cpp index 27c57d5f302..08bbe0c3f37 100644 --- a/lib/CodeGen/LiveRangeEdit.cpp +++ b/lib/CodeGen/LiveRangeEdit.cpp @@ -218,6 +218,22 @@ bool LiveRangeEdit::foldAsLoad(LiveInterval *LI, return true; } +bool LiveRangeEdit::useIsKill(const LiveInterval &LI, + const MachineOperand &MO) const { + const MachineInstr *MI = MO.getParent(); + SlotIndex Idx = LIS.getInstructionIndex(MI).getRegSlot(); + if (LI.Query(Idx).isKill()) + return true; + const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo(); + unsigned SubReg = MO.getSubReg(); + unsigned LaneMask = TRI.getSubRegIndexLaneMask(SubReg); + for (const LiveInterval::SubRange &S : LI.subranges()) { + if ((S.LaneMask & LaneMask) != 0 && S.Query(Idx).isKill()) + return true; + } + return false; +} + /// Find all live intervals that need to shrink, then remove the instruction. void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink) { assert(MI->allDefsAreDead() && "Def isn't really dead"); @@ -266,9 +282,8 @@ void LiveRangeEdit::eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink) { // unlikely to change anything. We typically don't want to shrink the // PIC base register that has lots of uses everywhere. // Always shrink COPY uses that probably come from live range splitting. - if (MI->readsVirtualRegister(Reg) && - (MI->isCopy() || MOI->isDef() || MRI.hasOneNonDBGUse(Reg) || - LI.Query(Idx).isKill())) + if ((MI->readsVirtualRegister(Reg) && (MI->isCopy() || MOI->isDef())) || + (MOI->readsReg() && (MRI.hasOneNonDBGUse(Reg) || useIsKill(LI, *MOI)))) ToShrink.insert(&LI); // Remove defined value. diff --git a/test/CodeGen/R600/subreg-eliminate-dead.ll b/test/CodeGen/R600/subreg-eliminate-dead.ll new file mode 100644 index 00000000000..cd414c7cb33 --- /dev/null +++ b/test/CodeGen/R600/subreg-eliminate-dead.ll @@ -0,0 +1,55 @@ +; RUN: llc -verify-machineinstrs -o - %s | FileCheck %s +; LiveRangeEdit::eliminateDeadDef did not update LiveInterval sub ranges +; properly. +target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64" +target triple = "amdgcn--" + +; CHECK-LABEL: foobar: +; Output with subregister liveness disabled: +; CHECK: v_mov_b32_e32 v1, 1 +; CHECK: v_mov_b32_e32 v0, 0 +; CHECK: v_cmp_eq_i32_e32 vcc, s0, v0 +; CHECK: v_cmp_eq_i32_e64 s[0:1], s0, v1 +; CHECK: v_mov_b32_e32 v1, 3 +; CHECK: v_mov_b32_e32 v0, 2 +; CHECK: v_cmp_eq_i32_e64 s[2:3], s0, v0 +; CHECK: v_cmp_eq_i32_e64 s[4:5], s0, v1 +; CHECK: v_cndmask_b32_e64 v3, 0, -1, s[4:5] +; CHECK: v_cndmask_b32_e64 v2, 0, -1, s[2:3] +; CHECK: v_cndmask_b32_e64 v1, 0, -1, s[0:1] +; CHECK: v_cndmask_b32_e64 v0, 0, -1, vcc +; CHECK: v_cmp_ne_i32_e32 vcc, 0, v1 +; CHECK: v_cndmask_b32_e64 v1, 0, v0, vcc +; CHECK: s_mov_b32 s3, 0xf000 +; CHECK: s_mov_b32 s2, -1 +; CHECK: buffer_store_dwordx2 v[0:1], s[0:3], 0 +; CHECK: s_endpgm +; Output with subregister liveness enabled: +; XCHECK: v_mov_b32_e32 v1, 1 +; XCHECK: v_mov_b32_e32 v0, 0 +; XCHECK: v_cmp_eq_i32_e32 vcc, s0, v1 +; XCHECK: v_mov_b32_e32 v1, 3 +; XCHECK: v_mov_b32_e32 v0, 2 +; XCHECK: v_cmp_eq_i32_e64 s[0:1], s0, v0 +; XCHECK: v_cmp_eq_i32_e64 s[2:3], s0, v1 +; XCHECK: v_cndmask_b32_e64 v3, 0, -1, s[2:3] +; XCHECK: v_cndmask_b32_e64 v2, 0, -1, s[0:1] +; XCHECK: v_cndmask_b32_e64 v1, 0, -1, vcc +; XCHECK: v_cmp_ne_i32_e32 vcc, 0, v1 +; XCHECK: v_cndmask_b32_e64 v1, 0, v0, vcc +; XCHECK: s_mov_b32 s3, 0xf000 +; XCHECK: s_mov_b32 s2, -1 +; XCHECK: buffer_store_dwordx2 v[0:1], s[0:3], 0 +; XCHECK: s_endpgm +define void @foobar() { + %v0 = icmp eq <4 x i32> undef, + %v3 = sext <4 x i1> %v0 to <4 x i32> + %v4 = extractelement <4 x i32> %v3, i32 1 + %v5 = icmp ne i32 %v4, 0 + %v6 = select i1 %v5, i32 undef, i32 0 + %v15 = insertelement <2 x i32> undef, i32 %v6, i32 1 + store <2 x i32> %v15, <2 x i32> addrspace(1)* undef, align 8 + ret void +} + +declare double @llvm.fma.f64(double, double, double)