From: Daniel Sanders Date: Thu, 27 Feb 2014 09:24:31 +0000 (+0000) Subject: Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets. X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=fb1e26d9a22d5da7ba00ea73f4989d3643556ff0;p=oota-llvm.git Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets. Summary: Fixes an issue where a test attempts to use -mcpu=x86-64 on non-X86-64 targets. This triggers an assertion in the MIPS backend since it doesn't know what ABI to use by default for unrecognized processors. CC: llvm-commits, rafael Differential Revision: http://llvm-reviews.chandlerc.com/D2877 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202369 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/test/CodeGen/X86/v4i32load-crash.ll b/test/CodeGen/X86/v4i32load-crash.ll index 052c4c3c61b..3e7f9e63c9a 100644 --- a/test/CodeGen/X86/v4i32load-crash.ll +++ b/test/CodeGen/X86/v4i32load-crash.ll @@ -1,10 +1,11 @@ -; RUN: llc --mcpu=x86-64 --mattr=ssse3 < %s +; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s +; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s ;PR18045: ;Issue of selection for 'v4i32 load'. ;This instruction is not legal for X86 CPUs with sse < 'sse4.1'. ;This node was generated by X86ISelLowering.cpp, EltsFromConsecutiveLoads -;static function after legilize stage. +;static function after legalize stage. @e = external global [4 x i32], align 4 @f = external global [4 x i32], align 4