From: Chris Lattner <sabre@nondot.org>
Date: Fri, 19 Aug 2005 01:04:33 +0000 (+0000)
Subject: The code emitter generator only supports targets with 32-bit instruction
X-Git-Url: http://demsky.eecs.uci.edu/git/?a=commitdiff_plain;h=fcd60a010b8da81b5b3528636fca78ebe4288c75;p=oota-llvm.git

The code emitter generator only supports targets with 32-bit instruction
words.  There is no way for one of these targets to have a > 32-bit immediate!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22897 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp
index 63658801243..d8f81548061 100644
--- a/utils/TableGen/CodeEmitterGen.cpp
+++ b/utils/TableGen/CodeEmitterGen.cpp
@@ -197,7 +197,7 @@ void CodeEmitterGen::run(std::ostream &o) {
         // this is not an operand!!
         if (beginBitInInst != -1) {
           o << "      // op" << op << ": " << Vals[i].getName() << "\n"
-            << "      int64_t op" << op
+            << "      int op" << op
             <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
           //<< "   MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
           OpOrder[Vals[i].getName()] = op++;