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[CodeGen] Rename AtomicRMWExpansionKind to AtomicExpansionKind.
[oota-llvm.git]
/
include
/
llvm
/
CodeGen
/
ScheduleDAG.h
2015-09-09
Chandler Carruth
[PM/AA] Rebuild LLVM's alias analysis infrastructure...
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2015-07-22
Hans Wennborg
Fix -Wextra-semi warnings.
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2015-06-23
Alexander Kornienko
Revert r240137 (Fixed/added namespace ending comments...
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2015-06-19
Alexander Kornienko
Fixed/added namespace ending comments using clang-tidy...
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2015-03-03
David Blaikie
Remove the explicit SUnitIterator::operator= as the...
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2015-01-07
Jonas Paulsson
New method SDep::isNormalMemoryOrBarrier() in ScheduleD...
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2014-04-14
Craig Topper
[C++11] More 'nullptr' conversion. In some cases just...
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2014-03-02
Alp Toker
[C++11] Expand and eliminate the LLVM_ENUM_INT_TYPE...
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2013-12-12
Hal Finkel
Add isBarrier to SDep
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2013-12-05
Andrew Trick
MI-Sched: Model "reserved" processor resources.
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2013-12-05
Andrew Trick
MI-Sched: handle latency of in-order operations with...
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2013-10-08
Reid Kleckner
Explicitly request unsigned enum types when desired
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2013-07-03
Eric Christopher
Use SmallVectorImpl::iterator/const_iterator instead...
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2013-06-15
Andrew Trick
Machine Model: Add MicroOpBufferSize and resource Buffe...
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2013-04-24
Andrew Trick
MI Sched: eliminate local vreg copies.
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2013-04-13
Andrew Trick
MI-Sched: schedule physreg copies.
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2013-03-01
Andrew Trick
Fix incorrect ScheduleDAG comment and formalize Weak...
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2013-02-20
Jakub Staszak
Fix #includes, so we include only what we really need.
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2013-01-25
Andrew Trick
MachineScheduler support for viewGraph.
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2013-01-25
Andrew Trick
ScheduleDAG: Added isBoundaryNode to conveniently detec...
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2013-01-24
Andrew Trick
MIsched: Added biasCriticalPath.
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2012-12-03
Chandler Carruth
Sort the #include lines for the include/... tree with...
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2012-11-13
Andrew Trick
misched: Don't consider artificial edges weak edges.
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2012-11-12
Andrew Trick
misched: Infrastructure for weak DAG edges.
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2012-11-06
Andrew Trick
misched: TargetSchedule interface for machine resources.
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2012-11-06
Andrew Trick
ScheduleDAG interface. Added OrderKind to distinguish...
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2012-10-10
Andrew Trick
misched: Use the TargetSchedModel interface wherever...
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2012-10-08
Andrew Trick
misched: remove forceUnitLatencies. Defaults are handle...
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2012-08-23
Andrew Trick
Simplify the computeOperandLatency API.
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2012-06-13
Andrew Trick
sched: Avoid trivially redundant DAG edges. Take the...
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2012-06-05
Andrew Trick
misched: API for minimum vs. expected latency.
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2012-03-14
Andrew Trick
misched: implemented a framework for top-down or bottom...
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2012-03-07
Andrew Trick
misched preparation: rename core scheduler methods...
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2012-03-07
Andrew Trick
misched preparation: clarify ScheduleDAG and ScheduleDA...
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2012-03-07
Andrew Trick
misched preparation: modularize schedule emission.
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2012-03-07
Andrew Trick
misched preparation: modularize schedule printing.
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2012-03-07
Andrew Trick
misched preparation: modularize schedule verification.
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2012-03-07
Andrew Trick
Cleanup in preparation for misched: Move DAG visualizat...
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2012-03-07
Andrew Trick
Cleanup: DAG building is specific to either SD or MI...
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2012-03-07
Andrew Trick
misched comments
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2012-02-22
Andrew Trick
Initialize SUnits before DAG building.
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2012-02-06
Craig Topper
Move some llvm_unreachable's from r149849 out of switch...
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2012-02-05
Craig Topper
Convert assert(0) to llvm_unreachable
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2012-01-12
Evan Cheng
Move Sched::Preference out of TargetMachine.h where...
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2011-12-20
David Blaikie
Unweaken vtables as per llvm.org/docs/CodingStandards...
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2011-06-28
Evan Cheng
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
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2011-06-15
Andrew Trick
Added -stress-sched flag in the Asserts build.
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2011-06-02
Devang Patel
Remove dead code.
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2011-04-26
Evan Cheng
Be careful about scheduling nodes above previous calls...
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2011-04-15
Chris Lattner
Fix a ton of comment typos found by codespell. Patch by
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2011-04-14
Andrew Trick
In the pre-RA scheduler, maintain cmp+br proximity.
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2011-04-07
Andrew Trick
Added a check in the preRA scheduler for potential...
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2011-03-07
Eric Christopher
Typos.
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2011-02-04
Andrew Trick
Introducing a new method of tracking register pressure...
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2010-12-25
Eric Christopher
Header warning patrol.
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2010-12-24
Andrew Trick
Minor cleanup related to my latest scheduler changes.
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2010-12-24
Andrew Trick
Various bits of framework needed for precise machine...
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2010-12-24
Andrew Trick
whitespace
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2010-12-20
Chris Lattner
update comment.
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2010-11-25
Benjamin Kramer
SDep is POD-like. Shave off a few bytes from SUnit...
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2010-11-03
Evan Cheng
Two sets of changes. Sorry they are intermingled.
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2010-05-26
Dan Gohman
Change push_all to a non-virtual function and implement...
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2010-05-26
Dan Gohman
Delete an unused function.
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2010-05-20
Evan Cheng
Allow targets more controls on what nodes are scheduled...
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2010-05-20
Evan Cheng
Add a hybrid bottom up scheduler that reduce register...
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2010-05-19
Jim Grosbach
Fix the post-RA instruction scheduler to handle instruc...
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2010-05-17
Zhongxing Xu
Remove unused member variable.
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2010-05-01
Dan Gohman
Get rid of the EdgeMapping map. Instead, just check...
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2010-04-13
Dan Gohman
Delete an unused member variable.
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2010-04-05
Chris Lattner
trim some prototypes.
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2010-03-10
Dale Johannesen
Progress towards shepherding debug info through Selecti...
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2009-11-20
David Goodwin
Remove some old experimental code that is no longer...
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2009-11-03
David Goodwin
Do a scheduling pass ignoring anti-dependencies to...
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2009-10-14
Dan Gohman
Delete bogus semicolons.
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2009-10-14
Eric Christopher
Remove a bunch of unused arguments from functions,...
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2009-10-12
Dan Gohman
Delete some obsolete declarations.
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2009-10-09
Dan Gohman
The ScheduleDAG framework now requires an AliasAnalysis...
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2009-09-30
Reid Kleckner
Fix integer overflow in instruction scheduling. This...
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2009-09-25
Dan Gohman
Improve MachineMemOperand handling.
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2009-09-18
Evan Cheng
Enhance EmitInstrWithCustomInserter() so target can...
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2009-08-27
Gabor Greif
eliminate all 80-col violations that I have introduced...
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2009-08-27
Gabor Greif
Clean up the minor mess I caused with removing iterator...
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2009-08-19
David Goodwin
Use the schedule itinerary operand use/def cycle inform...
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2009-08-13
David Goodwin
Add callback to allow target to adjust latency of sched...
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2009-03-23
Dan Gohman
Add a new bit to SUnit to record whether a node has...
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2009-03-19
Sebastian Redl
Fix the Win32 VS2008 build:
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2009-02-14
Cedric Venet
Unbreak the build on win32.
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2009-02-11
Dan Gohman
When scheduling a block in parts, keep track of the...
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2009-02-10
Dan Gohman
Factor out more code for computing register live-range...
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2009-02-07
Dan Gohman
Constify TargetInstrInfo::EmitInstrWithCustomInserter...
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2009-02-06
Dan Gohman
Tidy up the ScheduleDAG class definition a little....
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2009-01-16
Dan Gohman
Instead of adding dependence edges between terminator...
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2009-01-16
Evan Cheng
CreateVirtualRegisters does trivial copy coalescing...
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2009-01-15
Dan Gohman
Move a few containers out of ScheduleDAGInstrs::BuildSc...
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2009-01-12
Evan Cheng
Fix PR3241: Currently EmitCopyFromReg emits a copy...
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2008-12-23
Dan Gohman
Rename BuildSchedUnits to BuildSchedGraph, and refactor the
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2008-12-22
Dan Gohman
Add an accesor for the isNormalMemory field in the...
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2008-12-17
Dan Gohman
Fix the comments for getDepth and getHeight.
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2008-12-16
Dan Gohman
Add initial support for back-scheduling address computa...
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2008-12-16
Dan Gohman
Fix some register-alias-related bugs in the post-RA...
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