Switch most getReservedRegs() clients to the MRI equivalent.
[oota-llvm.git] / include / llvm / Target /
2012-06-06 Manman RenRevert r157755.
2012-06-05 Andrew Trickmisched: API for minimum vs. expected latency.
2012-06-05 Lang HamesAdd a new intrinsic: llvm.fmuladd. This intrinsic repre...
2012-06-05 Andrew Trickmisched: Added MultiIssueItineraries.
2012-06-05 Andrew Trickwhitespace
2012-06-04 Nadav RotemRemove the "-promote-elements" flag. This flag is now...
2012-05-31 Manman RenX86: replace SUB with CMP if possible
2012-05-31 Jakob Stoklund OlesenAdd a PrintRegUnit helper similar to PrintReg.
2012-05-30 Jakob Stoklund OlesenAdd MCRegisterInfo::RegListIterator.
2012-05-29 Jakob Stoklund OlesenUse MCRegUnitIterator to compute regsOverlap().
2012-05-25 Justin HolewinskiChange interface for TargetLowering::LowerCallTo and...
2012-05-25 Eli FriedmanSimplify code for calling a function where CanLowerRetu...
2012-05-24 Andrew Trickmisched: Added ScoreboardHazardRecognizer.
2012-05-24 Owen AndersonTeach tblgen's set theory "sequence" operator to suppor...
2012-05-17 Evandro Menezes[Hexagon] Clean up Hexagon ELF definition.
2012-05-15 Jim GrosbachTableGen'erate mapping physical registers to encoding...
2012-05-14 Dan GohmanRename @llvm.debugger to @llvm.debugtrap.
2012-05-11 Dan GohmanDefine a new intrinsic, @llvm.debugger. It will be...
2012-05-07 Jakob Stoklund OlesenAdd an MF argument to TRI::getPointerRegClass() and...
2012-05-07 Jakob Stoklund OlesenAdd TRI::getCommonSuperRegClass().
2012-05-05 Benjamin KramerAdd a new target hook "predictableSelectIsExpensive".
2012-05-04 Jakob Stoklund OlesenRemove the SubRegClasses field from RegisterClass descr...
2012-05-04 Jakob Stoklund OlesenRemove TargetRegisterClass::SuperRegClasses.
2012-05-04 Jakob Stoklund OlesenUse SuperRegClassIterator for findRepresentativeClass().
2012-05-04 Jakob Stoklund OlesenAdd a SuperRegClassIterator class.
2012-05-03 Jakob Stoklund OlesenUse a shared implementation of getMatchingSuperRegClass().
2012-05-03 Jakob Stoklund OlesenAdd TargetRegisterClass::getSuperRegIndices().
2012-05-03 Jakob Stoklund OlesenFix the type of SubClassMask.
2012-05-03 Jakob Stoklund OlesenDon't override subreg functions in targets without...
2012-05-03 Andrew TrickAdded TargetRegisterInfo::getAllocatableClass.
2012-04-24 Jim GrosbachARM: improved assembler diagnostics for missing CPU...
2012-04-23 Preston GurdThis patch fixes a problem which arose when using the...
2012-04-20 Andrew TrickAdded TargetRegisterInfo::getRegPressureSetName.
2012-04-20 Jim GrosbachAdd documentation comment.
2012-04-19 Jim GrosbachTableGen support for auto-generating assembly two-opera...
2012-04-17 Joe Grofffix pr12559: mark unavailable win32 math libcalls
2012-04-17 Andrew TrickTypo in an unused field.
2012-04-11 Andrew TrickTableGen's regpressure: emit per-registerclass weight...
2012-04-11 Duncan SandsComment typo fix.
2012-04-10 Andrew TrickAdded a TargetRegisterInfo interface for accessing...
2012-04-10 Evan ChengFix a long standing tail call optimization bug. When...
2012-04-08 Chandler CarruthTeach LLVM about a PIE option which, when enabled on...
2012-04-08 Chandler CarruthMove the TLSModel information into the TargetMachine...
2012-04-04 Rafael EspindolaAlways compute all the bits in ComputeMaskedBits.
2012-04-02 Owen AndersonAdd predicates for checking whether targets have free...
2012-03-25 Craig TopperPrune some includes and forward declarations.
2012-03-13 Pete CooperTarget override to allow CodeGenPrepare to sink address...
2012-03-05 Jim GrosbachMCRegisterInfo-ize getMatchingSuperReg.
2012-03-05 Craig TopperConvert more GenRegisterInfo tables from unsigned to...
2012-03-04 Craig TopperUse uint16_t to store register overlaps to reduce stati...
2012-03-04 Craig TopperUse uint16_t instead of unsigned to store registers...
2012-03-04 Craig TopperUse uint16_t to store registers in callee saved registe...
2012-03-01 Benjamin KramerMove getSubRegIndex out of generated code into MCRegist...
2012-03-01 Jim GrosbachMove TargetRegisterInfo::getSubReg() to MCRegisterInfo.
2012-03-01 Benjamin KramerMake TargetRegisterClasses non-virtual by making the...
2012-02-28 Evan ChengRe-commit r151623 with fix. Only issue special no-retur...
2012-02-28 Daniel DunbarRevert r151623 "Some ARM implementaions, e.g. A-series...
2012-02-28 Evan ChengSome ARM implementaions, e.g. A-series, does return...
2012-02-22 Craig TopperMake all pointers to TargetRegisterClass const since...
2012-02-20 James MolloyImprove generated code for extending loads and some...
2012-02-15 Bill WendlingModify the code that emits the module flags to use...
2012-02-14 Bill WendlingAdd code to the target lowering object file module...
2012-02-14 Lang HamesRename getExceptionAddressRegister() to getExceptionPoi...
2012-02-12 Nick LewyckyRemove redundant getAnalysis<> calls in GlobalOpt....
2012-02-10 Andrew TrickRegAlloc superpass: includes phi elimination, coalescin...
2012-02-09 Benjamin KramerStore just the SimpleValueType in the generated VT...
2012-02-05 Craig TopperConvert assert(0) to llvm_unreachable
2012-02-04 Andrew TrickTargetPassConfig: confine the MC configuration to Targe...
2012-02-03 Andrew TrickAdded TargetPassConfig. The first little step toward...
2012-02-02 Jakob Stoklund OlesenRequire non-NULL register masks.
2012-02-01 Jakob Stoklund OlesenSpecify SubRegIndex components on the index itself.
2012-02-01 Andrew TrickVLIW specific scheduler framework that utilizes determi...
2012-01-25 Anton KorobeynikovProperly emit ctors / dtors with priorities into desire...
2012-01-24 Jakob Stoklund OlesenAdd an (interleave A, B, ...) SetTheory operator.
2012-01-20 David BlaikieMore dead code removal (using -Wunreachable-code)
2012-01-19 Nick LewyckyAdd a TargetOption for disabling tail calls.
2012-01-18 Jakob Stoklund OlesenAdd a CoveredBySubRegs property to Register descriptions.
2012-01-17 Jakob Stoklund OlesenAdd TableGen support for callee saved registers.
2012-01-17 Andrew TrickMoving options declarations around.
2012-01-14 Jakob Stoklund OlesenAdd TRI::getCallPreservedMask() hook.
2012-01-13 Andrew TrickAdded the MachineSchedulerPass skeleton.
2012-01-13 Andrew Trickwhitespace
2012-01-12 Evan ChengAllow targets to select source order pre-RA scheduler.
2012-01-12 Evan ChengMove Sched::Preference out of TargetMachine.h where...
2012-01-10 Chandler CarruthAdd 'llvm_unreachable' to passify GCC's understanding...
2012-01-10 David BlaikieRemove unnecessary default cases in switches that cover...
2012-01-09 Devang PatelSplit AsmParser into two components - AsmParser and...
2011-12-20 David BlaikieUnweaken vtables as per llvm.org/docs/CodingStandards...
2011-12-19 Evan ChengAdd a if-conversion optimization that allows 'true...
2011-12-19 Eli FriedmanAdd "using" to silence warnings.
2011-12-19 Eli FriedmanAttempt to fix PR11607 by shuffling around which class...
2011-12-19 Jakob Stoklund OlesenEmit a getMatchingSuperRegClass() implementation for...
2011-12-14 Evan ChengModel ARM predicated write as read-mod-write. e.g.
2011-12-14 Evan ChengAllow target to specify register output dependency...
2011-12-13 Chandler CarruthInitial CodeGen support for CTTZ/CTLZ where a zero...
2011-12-10 Nick LewyckyMinimize #include's and forward-declares in Target.
2011-12-09 Evan ChengMove isUnpredicatedTerminator() default implementation...
2011-12-08 Owen AndersonEnhance both TargetLibraryInfo and SelectionDAGBuilder...
2011-12-06 Jim GrosbachExtend AsmMatcher token literal matching to allow aliasing.
2011-12-06 Evan ChengFirst chunk of MachineInstr bundle support.
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