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Refactor the handling of lexical block and inline scope ranges
[oota-llvm.git]
/
lib
/
CodeGen
/
ScheduleDAGInstrs.cpp
2013-10-10
Matthias Braun
Pass LiveQueryResult by value
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2013-09-04
Andrew Trick
mi-sched: bypass heuristic checks when regpressure...
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2013-08-30
Andrew Trick
mi-sched: update PressureDiffs on-the-fly for liveness.
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2013-08-30
Andrew Trick
mi-sched: Precompute a PressureDiff for each instructio...
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2013-08-29
Andrew Trick
Comment and revise the cyclic critical path code.
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2013-08-29
Hal Finkel
Add useAA() to TargetSubtargetInfo
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2013-08-23
Andrew Trick
Adds cyclic critical path computation and heuristics...
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2013-08-23
Andrew Trick
MI Sched: record local vreg uses.
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2013-08-23
Andrew Trick
mi-sched: Don't call MBB.size() in initSUnits. The...
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2013-07-03
Craig Topper
Use SmallVectorImpl instead of SmallVector for iterator...
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2013-06-29
Benjamin Kramer
misched: Compress pairs returned by getUnderlyingObject...
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2013-06-15
Andrew Trick
Machine Model: Add MicroOpBufferSize and resource Buffe...
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2013-04-13
Andrew Trick
MI-Sched: schedule physreg copies.
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2013-02-12
Sergei Larin
Equal treatment of labels and other terminators in...
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2013-01-25
Andrew Trick
ScheduleDAG: colorize the DOT graph and improve formatting.
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2013-01-25
Andrew Trick
ScheduleDAG: Added isBoundaryNode to conveniently detec...
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2013-01-25
Andrew Trick
SchedDFS: Complete support for nested subtrees.
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2013-01-25
Andrew Trick
MIsched: Improve the interface to SchedDFS analysis...
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2013-01-25
Andrew Trick
SchedDFS: Initial support for nested subtrees.
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2013-01-25
Andrew Trick
SchedDFS: Refactor and tweak the subtree selection...
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2013-01-21
Michael Ilseman
Introduce a new data structure, the SparseMultiSet...
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2013-01-02
Chandler Carruth
Move all of the header files which are involved in...
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2012-12-18
Andrew Trick
MISched: add dependence to ExitSU to model live-out...
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2012-12-10
Hal Finkel
Use GetUnderlyingObjects in misched
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2012-12-03
Chandler Carruth
Use the new script to sort the includes of every file...
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2012-12-01
Andrew Trick
misched: Fix RegisterPressureTracker handling of DebugVals.
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2012-12-01
Andrew Trick
misched: Fix the DAG builder to handle an undef operand...
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2012-11-28
Andrew Trick
misched: Analysis that partitions the DAG into subtrees.
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2012-11-28
Andrew Trick
misched: rename ScheduleDAGILP to ScheduleDFS to prepar...
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2012-11-28
Andrew Trick
misched: better alias analysis.
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2012-11-15
Sergei Larin
Fix indeterminism in MI scheduler DAG construction.
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2012-11-12
Andrew Trick
misched: Infrastructure for weak DAG edges.
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2012-11-06
Andrew Trick
ScheduleDAG interface. Added OrderKind to distinguish...
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2012-10-30
Chad Rosier
[inline asm] Implement mayLoad and mayStore for inline...
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2012-10-29
Preston Gurd
This patch addresses a problem with the Post RA schedul...
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2012-10-26
Nick Lewycky
Fix typo in comment.
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2012-10-15
Andrew Trick
misched: ILP scheduler for experimental heuristics.
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2012-10-10
Andrew Trick
misched: Use the TargetSchedModel interface wherever...
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2012-10-09
Andrew Trick
misched: Remove LoopDependencies heuristic.
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2012-10-08
Andrew Trick
misched: remove the unused getSpecialAddressLatency...
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2012-10-08
Andrew Trick
misched: remove forceUnitLatencies. Defaults are handle...
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2012-09-18
Andrew Trick
misched: Make ScheduleDAGInstrs use the TargetSchedule...
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2012-09-11
Manman Ren
Release build: guard dump functions with
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2012-09-06
Manman Ren
Release build: guard dump functions with "ifndef NDEBUG"
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2012-08-29
Jakob Stoklund Olesen
Rename hasVolatileMemoryRef() to hasOrderedMemoryRef().
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2012-08-23
Andrew Trick
Simplify the computeOperandLatency API.
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2012-07-30
Andrew Trick
Use the latest MachineRegisterInfo APIs. No functionality.
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2012-07-28
Andrew Trick
Reenable a basic SSA DAG builder optimization.
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2012-06-14
Andrew Trick
misched: disable SSA check pending PR13112.
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2012-06-13
Andrew Trick
sched: fix latency of memory dependence chain edges...
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2012-06-06
Andrew Trick
Move RegisterPressure.h.
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2012-06-06
Benjamin Kramer
Remove unused private fields found by clang's new ...
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2012-06-05
Andrew Trick
misched: API for minimum vs. expected latency.
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2012-06-01
Jakob Stoklund Olesen
Switch all register list clients to the new MC*Iterator...
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2012-05-20
Jakob Stoklund Olesen
Use LiveRangeQuery in ScheduleDAGInstrs.
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2012-05-15
Andrew Trick
Add -enable-aa-sched-mi, off by default, for AliasAnaly...
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2012-04-24
Andrew Trick
misched: DAG builder must special case earlyclobber
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2012-04-24
Andrew Trick
misched: DAG builder support for tracking register...
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2012-04-20
Andrew Trick
New and improved comment.
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2012-04-20
Andrew Trick
SparseSet: Add support for key-derived indexes and...
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2012-04-20
Andrew Trick
misched: initialize BB
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2012-04-13
Andrew Trick
misched: Added CanHandleTerminators.
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2012-03-16
Benjamin Kramer
ScheduleDAGInstrs: When adding uses we add them into...
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2012-03-16
Andrew Trick
misched: add DAG edges from vreg defs to ExitSU.
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2012-03-14
Andrew Trick
misched: implemented a framework for top-down or bottom...
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2012-03-09
Andrew Trick
misched interface: rename Begin/End to RegionBegin...
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2012-03-07
Andrew Trick
misched prep: Expose the ScheduleDAGInstrs interface...
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2012-03-07
Andrew Trick
misched prep: Comment the ScheduleDAGInstrs interface.
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2012-03-07
Andrew Trick
misched prep: Cleanup ScheduleDAGInstrs interface.
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2012-03-07
Andrew Trick
misched prep: rename InsertPos to End.
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2012-03-07
Andrew Trick
misched preparation: rename core scheduler methods...
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2012-03-07
Andrew Trick
misched preparation: clarify ScheduleDAG and ScheduleDA...
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2012-03-07
Andrew Trick
misched preparation: modularize schedule emission.
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2012-03-07
Andrew Trick
Cleanup in preparation for misched: Move DAG visualizat...
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2012-03-04
Craig Topper
Use uint16_t to store register overlaps to reduce stati...
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2012-02-24
Andrew Trick
PostRA sched: speed up physreg tracking by not abusing...
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2012-02-23
Andrew Trick
misched: cleanup reaching def computation
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2012-02-23
Andrew Trick
PostRASched: Convert physreg def/use tracking to Jakob...
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2012-02-22
Jakob Stoklund Olesen
Don't compute latencies for regmask operands.
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2012-02-22
Andrew Trick
misched: Use SparseSet for VRegDegs for constant time...
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2012-02-22
Andrew Trick
Comment from code review
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2012-02-22
Andrew Trick
misched: DAG builder should not track dependencies...
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2012-02-22
Andrew Trick
Initialize SUnits before DAG building.
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2012-02-21
Andrew Trick
Clear virtual registers after they are no longer refere...
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2012-01-14
Andrew Trick
misched: Initial code for building an MI level scheduli...
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2012-01-14
Andrew Trick
Move physreg dependency generation into aptly named...
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2012-01-14
Andrew Trick
misched: Added ScheduleDAGInstrs::IsPostRA
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2012-01-07
Evan Cheng
Added a late machine instruction copy propagation pass...
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2012-01-05
Chandler Carruth
Remove an unused variable.
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2012-01-05
Andrew Trick
Minor postra scheduler cleanup. It could result in...
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2011-12-14
Evan Cheng
Model ARM predicated write as read-mod-write. e.g.
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2011-12-14
Evan Cheng
Allow target to specify register output dependency...
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2011-12-14
Evan Cheng
- Add MachineInstrBundle.h and MachineInstrBundle.cpp...
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2011-12-07
Evan Cheng
Add bundle aware API for querying instruction propertie...
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2011-12-06
Evan Cheng
First chunk of MachineInstr bundle support.
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2011-12-02
Hal Finkel
make sure ScheduleDAGInstrs::EmitSchedule does not...
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2011-10-07
Andrew Trick
PostRA scheduler fix. Clear stale loop dependencies.
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2011-10-07
Andrew Trick
whitespace
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2011-07-01
Evan Cheng
Rename TargetSubtarget to TargetSubtargetInfo for consi...
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2011-06-29
Evan Cheng
Sink SubtargetFeature and TargetInstrItineraries (renam...
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