Clear kill flags on the fly when joining intervals.
[oota-llvm.git] / lib / CodeGen / SelectionDAG /
2012-05-20 Peter CollingbourneWhen legalising shifts, do not pre-build a list of...
2012-05-20 Jakob Stoklund OlesenProperly constrain register classes for sub-registers.
2012-05-18 Stepan DyatkovskiyRecommited reworked r156804:
2012-05-17 Stepan DyatkovskiySelectionDAGBuilder: CaseBlock, CaseRanges and CaseCmp...
2012-05-16 Duncan SandsFix a thinko in DisintegrateMERGE_VALUES. Patch by...
2012-05-15 Stepan DyatkovskiyRejected r156804 due to buildbots failures.
2012-05-15 Stepan DyatkovskiySelectionDAGBuilder::Clusterify : main functinality...
2012-05-14 Dan GohmanRename @llvm.debugger to @llvm.debugtrap.
2012-05-11 Chad RosierRevert 156658.
2012-05-11 Chad Rosier[fast-isel] Fast-isel doesn't use the expect intrinsic.
2012-05-11 Dan GohmanDefine a new intrinsic, @llvm.debugger. It will be...
2012-05-08 Jim GrosbachDAGCombiner should not change the type of an extract_ve...
2012-05-07 Jakob Stoklund OlesenAdd an MF argument to TRI::getPointerRegClass() and...
2012-05-07 Owen AndersonTeach DAG combine to fold x-x to 0.0 when unsafe FP...
2012-05-05 Benjamin KramerAdd a new target hook "predictableSelectIsExpensive".
2012-05-04 Jakob Stoklund OlesenMake sure findRepresentativeClass picks the widest...
2012-05-04 Jakob Stoklund OlesenUse SuperRegClassIterator for findRepresentativeClass().
2012-05-03 Andrew TrickAdded TargetRegisterInfo::getAllocatableClass.
2012-05-02 Owen AndersonTeach DAGCombine the same multiply-by-1.0 folding trick...
2012-05-02 Owen AndersonTeach DAG combine that multiplication by 1.0 can always...
2012-05-01 Jakub StaszakUse dyn_cast instead of checking opcode and cast.
2012-05-01 Bill WendlingStrip the pointer casts off of allocas so that the...
2012-04-30 Jakub StaszakAdd some constantness. No functionality change.
2012-04-28 Andrew TrickReapply 155668: Fix the SD scheduler to avoid gluing...
2012-04-27 Andrew TrickTemporarily revert r155668: Fix the SD scheduler to...
2012-04-26 Andrew TrickFix the SD scheduler to avoid gluing the same node...
2012-04-22 Elena DemikhovskyZERO_EXTEND/SIGN_EXTEND/TRUNCATE optimization for AVX2
2012-04-21 Nadav RotemTeach getVectorTypeBreakdown about promotion of vectors...
2012-04-20 Jakob Stoklund OlesenFix PR12599.
2012-04-20 Jakob Stoklund OlesenMake ISelPosition a local variable.
2012-04-20 Jakob Stoklund OlesenRegister DAGUpdateListeners with SelectionDAG.
2012-04-17 Joel JonesFixes a problem in instruction selection with testing...
2012-04-16 Hal FinkelRemove dead SD nodes after the combining pass. Fixes...
2012-04-15 Nadav RotemWhen emulating vselect using OR/AND/XOR make sure to...
2012-04-11 Nadav RotemReapply 154397. Original message:
2012-04-11 Craig TopperFix an overly indented line. Remove an 'else' after...
2012-04-11 Craig TopperInline implVisitAluOverflow by introducing a nested...
2012-04-11 Craig TopperOptimize code a bit by calling push_back only once...
2012-04-10 Owen AndersonMove the constant-folding support for FP_ROUND in Selec...
2012-04-10 Duncan SandsAdd a comment noting that the fdiv -> fmul conversion...
2012-04-10 Eric ChristopherTo ensure that we have more accurate line information...
2012-04-10 Owen AndersonRevert r154397, which was causing make check failures...
2012-04-10 Nadav RotemFix a dagcombine optimization which assumes that the...
2012-04-10 Anton KorobeynikovTransform div to mul with reciprocal only when fp imm...
2012-04-10 Evan ChengMake the code slightly more palatable.
2012-04-10 Evan ChengFix a long standing tail call optimization bug. When...
2012-04-10 Rafael EspindolaDon't try to zExt just to check if an integer constant...
2012-04-09 Akira HatanakaHave TargetLowering::getPICJumpTableRelocBase return...
2012-04-09 Rafael EspindolaPattern match a setcc of boolean value with 0 as a...
2012-04-09 Craig TopperRemove unnecessary type check when combining and/or...
2012-04-09 Craig TopperRemove unnecessary 'else' on an 'if' that always returns
2012-04-09 Craig TopperOptimize code slightly. No functionality change.
2012-04-09 Craig TopperReplace some explicit checks with asserts for condition...
2012-04-08 Craig TopperOptimize code a bit. No functional change intended.
2012-04-08 Benjamin KramerSilence sign-compare warning.
2012-04-08 Duncan SandsOnly have codegen turn fdiv by a constant into fmul...
2012-04-08 Craig TopperSimplify code that tries to do vector extracts for...
2012-04-08 Chandler CarruthMove the TLSModel information into the TargetMachine...
2012-04-07 Craig TopperTurn avx2 vinserti128 intrinsic calls into INSERT_SUBVE...
2012-04-07 Craig TopperRemove 'else' after 'if' that ends in return.
2012-04-07 Nadav Rotem1. Remove the part of r153848 which optimizes shuffle...
2012-04-07 Duncan SandsConvert floating point division by a constant into...
2012-04-05 Jakob Stoklund OlesenDon't break the IV update in TLI::SimplifySetCC().
2012-04-05 Owen AndersonTreat f16 the same as f80/f128 for the purposes of...
2012-04-04 Pete Cooperf16 FREM can now be legalized by promoting to f32
2012-04-04 Rafael EspindolaAlways compute all the bits in ComputeMaskedBits.
2012-04-04 Craig TopperRemove default case from switch that was already coveri...
2012-04-04 Pete CooperRemoved useless switch for default case when switch...
2012-04-03 Pete CooperAdd VSELECT to LegalizeVectorTypes::ScalariseVectorResu...
2012-04-03 Chad RosierFix an issue in SimplifySetCC() specific to vector...
2012-04-02 Owen AndersonAdd predicates for checking whether targets have free...
2012-04-02 Nadav RotemOptimizing swizzles of complex shuffles may generate...
2012-04-01 Nadav RotemThis commit contains a few changes that had to go in...
2012-03-31 Rafael EspindolaTeach CodeGen's version of computeMaskedBits to underst...
2012-03-30 Bill WendlingIf we have a VLA that has a "use" in a metadata node...
2012-03-28 Eric ChristopherMore debug output.
2012-03-27 Chris Lattnerfix what looks like a real logic bug, found by PVS...
2012-03-26 Eric ChristopherAdd a debug statement.
2012-03-24 Hal FinkelAdd the ability to promote legal integer VAARGs. This...
2012-03-22 Evan ChengSource order scheduler should not preschedule nodes...
2012-03-22 Evan ChengAssign node orders to target intrinsics which do not...
2012-03-22 Chad Rosier[fast-isel] Fold "urem x, pow2" -> "and x, pow2-1"...
2012-03-21 Jim GrosbachChecking a build_vector for an all-ones value.
2012-03-20 Craig TopperWhen combining (vextract shuffle (load ), <1,u,u,u...
2012-03-20 Eric ChristopherDo everything up to generating code to try to get a...
2012-03-20 Eric ChristopherUntabify.
2012-03-20 Eric ChristopherAdd another debugging statement here.
2012-03-20 Eric ChristopherUse lookUpRegForValue here instead of duplicating the...
2012-03-19 Pete Cooperf16 FDIV can now be legalized by promoting to f32
2012-03-19 Duncan SandsFix DAG combine which creates illegal vector shuffles...
2012-03-16 NAKAMURA TakumiRevert r152613 (and r152614), "Inline the d'tor and...
2012-03-15 Eric ChristopherWe actually handle AllocaInst via getRegForValue below...
2012-03-15 Eric ChristopherAdd some debugging output into fast isel as well.
2012-03-15 Eric ChristopherAdd another debug statement.
2012-03-15 Nadav RotemWhen optimizing certain BUILD_VECTOR nodes into other...
2012-03-15 Bill WendlingAdd a xform to the DAG combiner.
2012-03-14 Bill WendlingInsert the debugging instructions in one fell-swoop...
2012-03-13 Evan ChengFortify r152675 a bit. Although I'm not able to come...
2012-03-13 Evan ChengDAG combine incorrectly optimize (i32 vextract (v4i16...
2012-03-13 Bill WendlingAdd a return type.
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