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[FastISel][AArch64] Follow-up fix for "Fix shift-immediate emission for "zero" shifts."
[oota-llvm.git]
/
lib
/
Target
/
AArch64
/
AArch64ISelLowering.cpp
2014-11-13
Aditya Nandakumar
We can get the TLOF from the TargetMachine - so constru...
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2014-11-13
Aditya Nandakumar
This patch changes the ownership of TLOF from TargetLow...
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2014-11-03
Oliver Stannard
[AArch64] Fix miscompile of comparison with 0xfffffffff...
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2014-10-17
James Molloy
[AArch64] Fix a silent codegen fault in BUILD_VECTOR...
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2014-10-16
Juergen Ributzka
[AArch64] Fix miscompile of sdiv-by-power-of-2.
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2014-10-08
Chad Rosier
[AArch64] Generate vector signed/unsigned mul and mla...
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2014-10-04
Benjamin Kramer
Make AAMDNodes ctor and operator bool (!!!) explicit...
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2014-10-03
Eric Christopher
constify TargetMachine parameter.
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2014-10-01
Asiri Rathnayake
Add missing natual vector cast.
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2014-09-17
Robin Morisset
[X86] Use the generic AtomicExpandPass instead of X86At...
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2014-09-10
Asiri Rathnayake
[AArch 64] Use a constant pool load for weak symbol...
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2014-09-04
Tim Northover
AArch64: fix vector-immediate BIC/ORR on big-endian...
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2014-09-04
Tim Northover
AArch64: fix big-endian immediate materialisation
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2014-09-03
Robin Morisset
Refactor AtomicExpandPass and add a generic isAtomic...
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2014-09-02
Aaron Ballman
Silencing an MSVC C4334 warning ('<<' : result of 32...
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2014-08-29
Reid Kleckner
AArch64: Silence -Wabsolute-value warning with std...
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2014-08-29
Robin Morisset
Fix typos in comments, NFC
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2014-08-29
Louis Gerbarg
Remove spurious mask operations from AArch64 add->compa...
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2014-08-29
Tim Northover
AArch64: only try to get operand of a known node.
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2014-08-29
Tim Northover
AArch64: skip select/setcc combine in complex case.
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2014-08-29
Jiangning Liu
[AArch64] Fix some failures exposed by value type v4f16...
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2014-08-28
Jim Grosbach
AArch64: More correctly constrain target vector extend...
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2014-08-28
David Xu
Generate CMN when comparing a short int with minus
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2014-08-27
Oliver Stannard
Teach the AArch64 backend about v4f16 and v8f16
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2014-08-27
Craig Topper
Simplify creation of a bunch of ArrayRefs by using...
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2014-08-19
Alexey Samsonov
Hide two different AlignMode enums in anonymous namespa...
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2014-08-18
Robin Morisset
Make use of isAtLeastRelease/Acquire in the ARM/AArch64...
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2014-08-18
Oliver Stannard
Teach the AArch64 backend to handle f16
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2014-08-18
Oliver Stannard
[ARM,AArch64] Do not tail-call to an externally-defined...
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2014-08-15
Amara Emerson
[AArch64] Narrow arguments passed in wrong position...
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2014-08-11
Jim Grosbach
AArch64: Tidy up a few comments.
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2014-08-06
Eric Christopher
Remove the target machine from CCState. Previously...
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2014-08-06
James Molloy
[AArch64] Conditional selects are expensive on out...
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2014-08-05
Yi Kong
AArch64: Add support for instruction prefetch intrinsic
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2014-08-04
Eric Christopher
Remove the TargetMachine forwards for TargetSubtargetIn...
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2014-08-01
Chad Rosier
[AArch64] Generate tbz/tbnz when comparing against...
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2014-07-31
Louis Gerbarg
Make sure no loads resulting from load->switch DAGCombi...
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2014-07-27
Matt Arsenault
Add alignment value to allowsUnalignedMemoryAccess
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2014-07-27
Tim Northover
AArch64: fix conversion of 'J' inline asm constraints.
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2014-07-25
Akira Hatanaka
[stack protector] Fix a potential security bug in stack...
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2014-07-25
Benjamin Kramer
Run sort_includes.py on the AArch64 backend.
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2014-07-24
Tim Northover
AArch64: refactor ReconstructShuffle function
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2014-07-24
Kevin Qin
[AArch64] Fix a bug generating incorrect instruction...
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2014-07-23
Jim Grosbach
[X86,AArch64] Extend vcmp w/ unary op combine to work...
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2014-07-23
Jim Grosbach
X86: restrict combine to when type sizes are safe.
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2014-07-23
Chad Rosier
[AArch64] Lower sdiv x, pow2 using add + select + shift.
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2014-07-18
Tim Northover
AArch64: implement efficient f16 bitcasts
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2014-07-18
Tim Northover
AArch64: support f16 extend/trunc operations.
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2014-07-18
Jim Grosbach
AArch64: Constant fold converting vector setcc results...
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2014-07-15
Tim Northover
AArch64: fall back to generic code for out of range...
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2014-07-11
Oliver Stannard
ARM: Allow __fp16 as a function arg or return type...
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2014-07-07
Kevin Qin
[AArch64] Normalize all constants to build a vector.
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2014-07-03
Chandler Carruth
[codegen,aarch64] Add a target hook to the code generat...
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2014-07-01
Juergen Ributzka
[DAG] Pass the argument list to the CallLoweringInfo...
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2014-07-01
Tim Northover
AArch64: fix comment typo
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2014-06-30
Chad Rosier
[AArch64] Convert mul x, -(pow2 +/- 1) to shift + add...
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2014-06-19
Craig Topper
Convert some assert(0) to llvm_unreachable or fold...
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2014-06-18
Kevin Qin
[AArch64] Fix a pattern match failure caused by creatin...
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2014-06-18
Craig Topper
Replace some assert(0)'s with llvm_unreachable.
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2014-06-16
James Molloy
[AArch64] Fix a fencepost error in lowering for llvm...
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2014-06-15
Tim Northover
AArch64: improve handling & modelling of FP_TO_XINT...
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2014-06-15
Tim Northover
AArch64: improve vector [su]itofp handling.
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2014-06-10
Eric Christopher
Move AArch64TargetLowering to AArch64Subtarget.
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2014-06-09
Chad Rosier
[AArch64] When combining constant mul of power of 2...
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2014-06-08
Craig Topper
[C++11] Use 'nullptr'.
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2014-06-03
Tim Northover
AArch64: mark small types (i1, i8, i16) as promoted
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2014-06-03
Jiangning Liu
[AArch64] Correctly deal with VPR stack parameter passing.
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2014-05-31
Eric Christopher
Have the TLOF creation take a Triple rather than needin...
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2014-05-29
Hao Liu
Fix an assertion failure caused by v1i64 in DAGCombiner...
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2014-05-26
Tim Northover
AArch64: force i1 to be zero-extended at an ABI boundary.
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2014-05-26
Tim Northover
AArch64: simplify calling conventions slightly.
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2014-05-24
Tim Northover
AArch64/ARM64: move ARM64 into AArch64's place
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2014-05-24
Tim Northover
AArch64/ARM64: remove AArch64 from tree prior to renami...
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2014-05-19
Benjamin Kramer
SDAG: Legalize vector BSWAP into a shuffle if the shuff...
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2014-05-17
Saleem Abdulrasool
Target: remove old constructors for CallLoweringInfo
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2014-05-16
Rafael Espindola
Revert "Implement global merge optimization for global...
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2014-05-15
Jiangning Liu
Implement global merge optimization for global variables.
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2014-05-11
Hal Finkel
Pass the value type to TLI::getRegisterByName
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2014-05-06
Renato Golin
Implememting named register intrinsics
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2014-04-29
Benjamin Kramer
AArch64: Mark vector long multiplication as expand.
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2014-04-27
Craig Topper
Convert SelectionDAG::getMergeValues to use ArrayRef.
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2014-04-26
Craig Topper
Convert getMemIntrinsicNode to take ArrayRef of SDValue...
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2014-04-26
Craig Topper
Convert SelectionDAG::getNode methods to use ArrayRef...
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2014-04-25
Craig Topper
[C++] Use 'nullptr'. Target edition.
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2014-04-24
Reid Kleckner
Add 'musttail' marker to call instructions
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2014-04-22
Jiangning Liu
[AArch64] Enable global merge pass.
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2014-04-22
Chandler Carruth
[Modules] Fix potential ODR violations by sinking the...
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2014-04-18
Jiangning Liu
This is one of the optimizations ported from ARM64...
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2014-04-18
Jiangning Liu
This commit enables unaligned memory accesses of vector...
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2014-04-16
Craig Topper
Convert SelectionDAG::getVTList to use ArrayRef
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2014-04-15
Nick Lewycky
Break PseudoSourceValue out of the Value hierarchy...
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2014-04-12
Chad Rosier
[AArch64] Implement the isLegalAddressingMode and getSc...
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2014-04-09
Chad Rosier
[AArch64] Implement the isZExtFree APIs.
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2014-04-09
Chad Rosier
[AArch64] Implement the isTruncateFree API.
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2014-04-04
Tim Northover
ARM64: handle v1i1 types arising from setcc properly.
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2014-04-04
Craig Topper
Make consistent use of MCPhysReg instead of uint16_t...
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2014-03-27
Logan Chien
[AArch64] Lower SHL_PARTS, SRA_PARTS and SRL_PARTS
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2014-03-26
Christian Pirker
AArch64_BE function argument passing for ARM ABI
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2014-03-10
Tim Northover
AArch64: fix LowerCONCAT_VECTORS for new CodeGen.
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2014-03-02
Benjamin Kramer
[C++11] Replace llvm::next and llvm::prior with std...
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