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Expose isXxxConstant() functions from SelectionDAGNodes.h (NFC)
[oota-llvm.git]
/
lib
/
Target
/
AMDGPU
/
SIInstrInfo.cpp
2015-11-06
Matt Arsenault
AMDGPU: Create emergency stack slots during frame lowering
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2015-11-06
Matt Arsenault
AMDGPU: Remove unused scratch resource operands
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2015-11-06
Matt Arsenault
AMDGPU: Fix hardcoded alignment of spill.
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2015-11-05
Matt Arsenault
AMDGPU: Also track whether SGPRs were spilled
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2015-11-05
Matt Arsenault
AMDGPU: Fix assert when legalizing atomic operands
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2015-11-03
Matt Arsenault
AMDGPU: Make findUsedSGPR more readable
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2015-10-21
Matt Arsenault
AMDGPU: Simplify VOP3 operand legalization.
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2015-10-21
Matt Arsenault
AMDGPU: Fix not checking implicit operands in verifyIns...
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2015-10-20
Matt Arsenault
AMDGPU: Add MachineInstr overloads for instruction...
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2015-10-07
Matt Arsenault
AMDGPU: Use explicit register size indirect pseudos
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2015-10-02
Matt Arsenault
AMDGPU/SI: Add verifier check for exec reads
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2015-09-29
Marek Olsak
AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE...
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2015-09-28
Matt Arsenault
AMDGPU: Factor switch into separate function
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2015-09-28
Matt Arsenault
AMDGPU: Fix splitting x16 SMRD loads
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2015-09-28
Matt Arsenault
AMDGPU: Fix moving SMRD loads with literal offsets...
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2015-09-28
Matt Arsenault
AMDGPU: Fix splitting SMRD with large offset
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2015-09-28
Andrew Kaylor
Improved the interface of methods commuting operands...
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2015-09-25
Matt Arsenault
AMDGPU: Construct new buffer instruction when moving...
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2015-09-25
Matt Arsenault
AMDGPU: Re-justify workaround and fix worked around...
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2015-09-25
Matt Arsenault
AMDGPU: Don't create REG_SEQUENCE with SGPR dest and...
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2015-09-24
Matt Arsenault
AMDGPU: Return after instruction is processed.
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2015-09-24
Matt Arsenault
AMDGPU: Remove another unnecessary check from commuteIn...
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2015-09-24
Matt Arsenault
AMDGPU: Reduce number of copies emitted
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2015-09-22
Matt Arsenault
AMDGPU: Remove unnecessary check
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2015-09-10
Matt Arsenault
AMDGPU/SI: Fix more cases of losing exec operands
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2015-09-09
Matt Arsenault
AMDGPU: Extract full 64-bit subregister and use subregs
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2015-09-01
Matt Arsenault
AMDGPU: Fix adding redundant implicit operands
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2015-08-29
Matt Arsenault
AMDGPU: Set mem operands for spill instructions
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2015-08-29
Matt Arsenault
AMDGPU: Fix dropping mem operands when moving to VALU
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2015-08-26
Matt Arsenault
AMDGPU: Delete dead code
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2015-08-26
Matt Arsenault
AMDGPU: Don't reprocess instructions when splitting...
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2015-08-26
Matt Arsenault
AMDGPU: Fix not moving users of s_bfe_i64 to VALU
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2015-08-26
Matt Arsenault
AMDGPU: Don't create intermediate SALU instructions
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2015-08-08
Benjamin Kramer
Fix some comment typos.
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2015-08-08
Matt Arsenault
AMDGPU/SI: Remove VCCReg
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2015-08-05
Matt Arsenault
AMDGPU/SI: Remove EXECReg
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2015-07-31
Alex Lorenz
AMDGPU/SI: Add implicit register operands in the correc...
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2015-07-30
Tom Stellard
AMDGPU/SI: Simplify moveSMRDToVALU()
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2015-07-30
Tom Stellard
AMDGPU/SI: Remove isTriviallyReMaterializable() functio...
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2015-07-14
Matt Arsenault
AMDGPU/SI: Fix read2 merging into a super register.
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2015-07-13
Tom Stellard
AMDGPU/SI: Select mad patterns to v_mac_f32
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2015-07-09
Tom Stellard
AMDGPU/SI: Fix crash on physical registers in SIInstrIn...
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2015-06-26
Tom Stellard
AMDPGU/SI: Use correct resource descriptors for VI...
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2015-06-26
Marek Olsak
AMDGPU: really don't commute REV opcodes if the target...
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2015-06-19
Eric Christopher
Fix "the the" in comments.
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2015-06-15
Sanjoy Das
[TargetInstrInfo] Rename getLdStBaseRegImmOfs and imple...
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2015-06-13
Tom Stellard
R600 -> AMDGPU rename
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2012-07-16
Tom Stellard
Revert "AMDGPU: Add core backend files for R600/SI...
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2012-07-16
Tom Stellard
AMDGPU: Add core backend files for R600/SI codegen v6
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