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AMDGPU: Rename enums to be consistent with HSA code object terminology
[oota-llvm.git]
/
lib
/
Target
/
AMDGPU
/
SIInstrInfo.h
2015-11-25
Marek Olsak
AMDGPU/SI: select S_ABS_I32 when possible (v2)
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2015-11-05
Matt Arsenault
AMDGPU: Fix assert when legalizing atomic operands
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2015-10-21
Matt Arsenault
AMDGPU: Simplify VOP3 operand legalization.
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2015-10-20
Matt Arsenault
AMDGPU: Add MachineInstr overloads for instruction...
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2015-09-29
Marek Olsak
AMDGPU/SI: Don't set DATA_FORMAT if ADD_TID_ENABLE...
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2015-09-28
Matt Arsenault
AMDGPU: Factor switch into separate function
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2015-09-28
Andrew Kaylor
Improved the interface of methods commuting operands...
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2015-09-25
Matt Arsenault
AMDGPU: Construct new buffer instruction when moving...
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2015-09-25
Matt Arsenault
AMDGPU: Make getNamedOperandIdx declaration readonly
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2015-09-24
Matt Arsenault
AMDGPU: Add readonly to InstrMapping functions
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2015-08-26
Matt Arsenault
AMDGPU: Delete dead code
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2015-08-26
Matt Arsenault
AMDGPU: Don't create intermediate SALU instructions
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2015-08-05
Matt Arsenault
AMDGPU/SI: Remove EXECReg
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2015-07-31
Alex Lorenz
AMDGPU/SI: Add implicit register operands in the correc...
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2015-07-30
Tom Stellard
AMDGPU/SI: Remove isTriviallyReMaterializable() functio...
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2015-07-13
Tom Stellard
AMDGPU/SI: Select mad patterns to v_mac_f32
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2015-06-26
Marek Olsak
AMDGPU: really don't commute REV opcodes if the target...
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2015-06-15
Sanjoy Das
[TargetInstrInfo] Rename getLdStBaseRegImmOfs and imple...
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2015-06-13
Tom Stellard
R600 -> AMDGPU rename
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2012-07-16
Tom Stellard
Revert "AMDGPU: Add core backend files for R600/SI...
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2012-07-16
Tom Stellard
AMDGPU: Add core backend files for R600/SI codegen v6
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