AMDGPU: Fix crash with dispatch.ptr intrinsic with non-HSA target
[oota-llvm.git] / lib / Target / AMDGPU / SIInstructions.td
2016-01-11 Matt ArsenaultAMDGPU: Pattern match ffbh pattern to instruction.
2016-01-05 Matt ArsenaultAMDGPU: Remove redundant let mayLoad = 1
2015-12-15 Tom StellardAMDGPU/SI: Select constant loads with non-uniform addre...
2015-12-15 Tom StellardAMDGPU/SI: Fix bitcast between v2f32 and f64
2015-12-15 Tom StellardAMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsics
2015-12-14 Matt ArsenaultAMDGPU: Use generic bitreverse intrinsic
2015-12-11 Matt ArsenaultStart replacing vector_extract/vector_insert with extra...
2015-12-10 Tom StellardAMDGPU/SI: Emit constant arrays in the .text section
2015-12-01 Tom StellardAMDGPU/SI: Remove REGISTER_STORE/REGISTER_LOAD code...
2015-11-25 Marek OlsakAMDGPU/SI: select S_ABS_I32 when possible (v2)
2015-11-25 Matt ArsenaultAMDGPU: Make v2i64/v2f64 legal types.
2015-11-06 Tom StellardAMDGPU/SI: Refactor VOP[12C] tablegen definitions
2015-11-06 Matt ArsenaultAMDGPU: Remove unused scratch resource operands
2015-10-29 Marek OlsakAMDGPU/SI: use S_OR for fneg (fabs f32)
2015-10-29 Marek OlsakAMDGPU/SI: use S_AND for i1 trunc
2015-10-07 Matt ArsenaultAMDGPU: Fix missing implicit m0 uses on movrel instructions
2015-10-07 Matt ArsenaultAMDGPU: Use explicit register size indirect pseudos
2015-10-06 Tom StellardAMDGPU/SI: Add 64-bit versions of v_nop and v_clrexcp
2015-10-02 Matt ArsenaultAMDGPU/SI: Add verifier check for exec reads
2015-09-26 Matt ArsenaultAMDGPU: VOP3b definition cleanups
2015-09-24 Matt ArsenaultAMDGPU: Add s_dcache_* instructions
2015-09-24 Matt ArsenaultAMDGPU: Add cache invalidation instructions.
2015-09-10 Matt ArsenaultAMDGPU/SI: Fix more cases of losing exec operands
2015-09-08 Matt ArsenaultAMDGPU/SI: Fix input vcc operand for VOP2b instructions
2015-09-08 Matt ArsenaultAMDGPU: Mark s_barrier as a high latency instruction
2015-09-08 Matt ArsenaultAMDGPU: Fix s_barrier flags
2015-08-29 Matt ArsenaultAMDGPU: Add sdst operand to VOP2b instructions
2015-08-29 Matt ArsenaultAMDGPU: Set mem operands for spill instructions
2015-08-26 Matt ArsenaultAMDGPU: Delete dead code
2015-08-22 Matt ArsenaultAMDGPU: Allow specifying different opcode on VI for...
2015-08-22 Matt ArsenaultAMDGPU: Improve accuracy of instruction rates for some...
2015-08-22 Matt ArsenaultAMDGPU: Move CI instructions into CIInstructions.td
2015-08-08 Matt ArsenaultAMDGPU/SI: Remove source uses of VCCReg
2015-08-07 Tom StellardAMDGPU/SI: v_mac_legacy_f32 does not exist on VI
2015-08-06 Tom StellardAMDGPU/SI: Add support for 32-bit immediate SMRD offset...
2015-08-06 Tom StellardAMDGPU/SI: Use ComplexPatterns for SMRD addressing...
2015-08-05 Matt ArsenaultAMDGPU/SI: Remove EXECReg
2015-08-05 Matt ArsenaultAMDGPU: Remove SCCReg.
2015-07-31 Tom StellardAMDGPU/SI: Remove unused pattern for f32 constant loads
2015-07-27 Marek OlsakAMDGPU: don't match vgpr loads for constant loads
2015-07-27 Marek OlsakAMDGPU/SI: Fix the V_FRACT_F64 SI bug workaround
2015-07-21 Matt ArsenaultAMDGPU: Set isMoveImm on s_movk_i32
2015-07-13 Tom StellardAMDGPU/SI: Select mad patterns to v_mac_f32
2015-06-13 Tom StellardR600 -> AMDGPU rename
2012-07-16 Tom StellardRevert "AMDGPU: Add core backend files for R600/SI...
2012-07-16 Tom StellardAMDGPU: Add core backend files for R600/SI codegen v6