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LSR: Don't optimize loops if an outer loop has no preheader.
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMISelDAGToDAG.cpp
2011-12-21
Jim Grosbach
ARM NEON assmebly parsing for VLD2 to all lanes instruc...
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2011-12-14
Jim Grosbach
ARM NEON refactor VST2 w/ writeback instructions.
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2011-12-09
Jim Grosbach
ARM assembly parsing and encoding for VLD2 with writeback.
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2011-11-29
Jim Grosbach
ARM assembly parsing and encoding for four-register...
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2011-11-29
Jim Grosbach
ARM assembly parsing and encoding for three-register...
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2011-10-31
Jim Grosbach
ARM VST1 w/ writeback assembly parsing and encoding.
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2011-10-27
Jakob Stoklund Olesen
Also set addrmode6 alignment when align==size.
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2011-10-27
Jim Grosbach
ARM isel for vld1, opcode selection for register stride...
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2011-10-24
Jim Grosbach
ARM refactor am6offset usage for VLD1.
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2011-10-18
Eli Friedman
Fix misc warnings. Patch by Joe Abbey.
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2011-10-10
Bill Wendling
Reapply r141365 now that PR11107 is fixed.
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2011-10-10
Bill Wendling
Revert r141365. It was causing MultiSource/Benchmarks...
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2011-10-08
Anton Korobeynikov
Disable ABS optimization for Thumb1 target, we don...
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2011-10-07
Anton Korobeynikov
Peephole optimization for ABS on ARM.
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2011-10-05
Cameron Zwarich
Always merge profitable shifts on A9, not just when...
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2011-10-05
Cameron Zwarich
Remove a check from ARM shifted operand isel helper...
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2011-10-05
Cameron Zwarich
Add braces around something that throws me for a loop.
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2011-10-05
Cameron Zwarich
There is no point in setting out-parameters for a Compl...
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2011-09-23
Jakob Stoklund Olesen
Also match negative offsets for addrmode3 and addrmode5.
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2011-09-13
Jim Grosbach
Tidy up a few 80 column violations.
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2011-08-31
Owen Anderson
When performing instruction selection for LDR_PRE_IMM...
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2011-08-31
Eli Friedman
64-bit atomic cmpxchg for ARM.
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2011-08-31
Eli Friedman
Some 64-bit atomic operations on ARM. 64-bit cmpxchg...
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2011-08-29
Owen Anderson
addrmode_imm12 and addrmode2_offset encode their immedi...
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2011-08-26
Owen Anderson
Fix ARM codegen breakage caused by r138653.
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2011-08-26
Owen Anderson
invalid-LDR_PRE-arm.txt was already passing, but for...
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2011-08-24
Jim Grosbach
Thumb1 ADD/SUB SP instructions are predicable in Thumb2...
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2011-08-05
Jim Grosbach
ARM refactor indexed store instructions.
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2011-07-27
Jim Grosbach
ARM parsing and encoding of SBFX and UBFX.
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2011-07-26
Owen Anderson
Split am2offset into register addend and immediate...
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2011-07-22
Owen Anderson
Fix test failures caused by my so_reg refactoring.
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2011-07-21
Owen Anderson
Get rid of the extraneous GPR operand on so_reg_imm...
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2011-07-21
Owen Anderson
Split up the ARM so_reg ComplexPattern into so_reg_reg...
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2011-07-20
Evan Cheng
Sink ARMMCExpr and ARMAddressingModes into MC layer...
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2011-06-28
Evan Cheng
- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
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2011-06-16
Owen Anderson
Change the REG_SEQUENCE SDNode to take an explict regis...
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2011-05-28
Bruno Cardoso Lopes
Add support for ARM ldrexd/strexd intrinsics. They...
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2011-04-29
Eli Friedman
Zap a couple now-unused functions.
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2011-04-19
Bob Wilson
This patch combines several changes from Evan Cheng...
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2011-04-19
Evan Cheng
Do not lose mem_operands while lowering VLD / VST intri...
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2011-03-18
Owen Anderson
Reduce code duplication.
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2011-03-14
Bill Wendling
Generate a VTBL instruction instead of a series of...
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2011-03-11
Jim Grosbach
Remove dead code. These ARM instruction definitions...
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2011-03-05
Bob Wilson
Remove unused conditional negate operations.
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2011-02-25
Bob Wilson
Add patterns to use post-increment addressing for Neon...
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2011-02-13
Chris Lattner
Enhance ComputeMaskedBits to know that aligned frameindexes
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2011-02-07
Bob Wilson
Add codegen support for using post-increment NEON load...
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2011-02-07
Bob Wilson
Change VLD3/4 and VST3/4 for quad registers to not...
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2011-01-20
Evan Cheng
Sorry, several patches in one.
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2011-01-19
Daniel Dunbar
ARM/ISel: Factor out isScaledConstantInRange() helper.
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2011-01-17
Evan Cheng
Materialize GA addresses with movw + movt pairs for...
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2011-01-01
Anton Korobeynikov
Model operand restrictions of mul-like instructions...
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2010-12-24
Andrew Trick
whitespace
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2010-12-21
Chris Lattner
rename MVT::Flag to MVT::Glue. "Flag" is a terrible...
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2010-12-17
Bob Wilson
Use PairDRegs to implement ConcatVectors. No functiona...
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2010-12-15
Jim Grosbach
Thumb1 had two patterns for the same load-from-constant...
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2010-12-15
Bill Wendling
Reapply r121808 now that the missing patterns have...
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2010-12-15
Bill Wendling
Revert r121808 until I can fix the build.
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2010-12-14
Bill Wendling
Make the ISel selections for LDR/STR the same as before...
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2010-12-14
Bill Wendling
The tLDR et al instructions were emitting either a...
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2010-12-10
Bob Wilson
Fix some invalid alignments for Neon vld-dup and vld...
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2010-12-05
Evan Cheng
Making use of VFP / NEON floating point multiply-accumu...
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2010-11-30
Bob Wilson
Add support for NEON VLD3-dup instructions.
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2010-11-29
Bob Wilson
Add support for NEON VLD3-dup instructions.
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2010-11-28
Bob Wilson
Add support for NEON VLD2-dup instructions.
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2010-11-19
Evan Cheng
Fix a cut-n-paste-error.
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2010-11-17
Evan Cheng
Avoid isel movcc of large immediates when the large...
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2010-11-13
Evan Cheng
Add conditional move of large immediate.
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2010-11-13
Evan Cheng
Fix an obvious typo which inverted an immediate.
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2010-11-12
Evan Cheng
Add conditional mvn instructions.
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2010-11-03
Duncan Sands
Simplify uses of MVT and EVT. An MVT can be compared...
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2010-11-03
Jim Grosbach
Break ARM addrmode4 (load/store multiple base address...
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2010-11-01
Bob Wilson
Add support for alignment operands on VLD1-lane instruc...
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2010-10-27
Evan Cheng
Shifter ops are not always free. Do not fold them ...
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2010-10-26
Jim Grosbach
First part of refactoring ARM addrmode2 (load/store...
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2010-10-21
Jim Grosbach
trailing whitespace
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2010-10-19
Bob Wilson
Support alignment for NEON vld-lane and vst-lane instru...
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2010-10-07
Jim Grosbach
Allow use of the 16-bit literal move instruction in...
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2010-10-07
Jim Grosbach
Allow use of the 16-bit literal move instruction in...
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2010-09-29
Jim Grosbach
Add specializations of addrmode2 that allow differentia...
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2010-09-29
Jim Grosbach
Add braces for legibility.
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2010-09-23
Bob Wilson
Set alignment operand for NEON VST instructions.
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2010-09-23
Bob Wilson
Set alignment operand for NEON VLD instructions.
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2010-09-21
Chris Lattner
fix a long standing wart: all the ComplexPattern's...
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2010-09-14
Eric Christopher
Fix QOpcode assignment to Opc.
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2010-09-13
Bob Wilson
Convert some VTBL and VTBX instructions to use pseudo...
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2010-09-13
Bob Wilson
Switch all the NEON vld-lane and vst-lane instructions...
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2010-09-05
Chris Lattner
remove some dead code. t2addrmode_imm8s4 is never...
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2010-09-03
Bob Wilson
Finish converting the rest of the NEON VLD instructions...
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2010-09-02
Bob Wilson
Convert VLD1 and VLD2 instructions to use pseudo-instru...
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2010-09-01
Chris Lattner
temporarily revert r112664, it is causing a decoding...
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2010-08-31
Bill Wendling
We have a chance for an optimization. Consider this...
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2010-08-28
Bob Wilson
Use pseudo instructions for VST1 and VST2.
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2010-08-28
Bob Wilson
We don't need to custom-select VLDMQ and VSTMQ anymore.
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2010-08-27
Bob Wilson
Change ARM VFP VLDM/VSTM instructions to use addressing...
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2010-08-26
Bob Wilson
Use pseudo instructions for VST3.
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2010-08-26
Bob Wilson
Use pseudo instructions for VST1d64Q.
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2010-08-25
Bob Wilson
Start converting NEON load/stores to use pseudo instruc...
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2010-08-17
Jakob Stoklund Olesen
Don't call tablegen'ed Predicate_* functions in the...
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2010-07-30
Evan Cheng
Add -disable-shifter-op to disable isel of shifter...
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