Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
[oota-llvm.git] / lib / Target / ARM / ARMISelDAGToDAG.cpp
2011-05-28 Bruno Cardoso LopesAdd support for ARM ldrexd/strexd intrinsics. They...
2011-04-29 Eli FriedmanZap a couple now-unused functions.
2011-04-19 Bob WilsonThis patch combines several changes from Evan Cheng...
2011-04-19 Evan ChengDo not lose mem_operands while lowering VLD / VST intri...
2011-03-18 Owen AndersonReduce code duplication.
2011-03-14 Bill WendlingGenerate a VTBL instruction instead of a series of...
2011-03-11 Jim GrosbachRemove dead code. These ARM instruction definitions...
2011-03-05 Bob WilsonRemove unused conditional negate operations.
2011-02-25 Bob WilsonAdd patterns to use post-increment addressing for Neon...
2011-02-13 Chris LattnerEnhance ComputeMaskedBits to know that aligned frameindexes
2011-02-07 Bob WilsonAdd codegen support for using post-increment NEON load...
2011-02-07 Bob WilsonChange VLD3/4 and VST3/4 for quad registers to not...
2011-01-20 Evan ChengSorry, several patches in one.
2011-01-19 Daniel DunbarARM/ISel: Factor out isScaledConstantInRange() helper.
2011-01-17 Evan ChengMaterialize GA addresses with movw + movt pairs for...
2011-01-01 Anton KorobeynikovModel operand restrictions of mul-like instructions...
2010-12-24 Andrew Trickwhitespace
2010-12-21 Chris Lattnerrename MVT::Flag to MVT::Glue. "Flag" is a terrible...
2010-12-17 Bob WilsonUse PairDRegs to implement ConcatVectors. No functiona...
2010-12-15 Jim GrosbachThumb1 had two patterns for the same load-from-constant...
2010-12-15 Bill WendlingReapply r121808 now that the missing patterns have...
2010-12-15 Bill WendlingRevert r121808 until I can fix the build.
2010-12-14 Bill WendlingMake the ISel selections for LDR/STR the same as before...
2010-12-14 Bill WendlingThe tLDR et al instructions were emitting either a...
2010-12-10 Bob WilsonFix some invalid alignments for Neon vld-dup and vld...
2010-12-05 Evan ChengMaking use of VFP / NEON floating point multiply-accumu...
2010-11-30 Bob WilsonAdd support for NEON VLD3-dup instructions.
2010-11-29 Bob WilsonAdd support for NEON VLD3-dup instructions.
2010-11-28 Bob WilsonAdd support for NEON VLD2-dup instructions.
2010-11-19 Evan ChengFix a cut-n-paste-error.
2010-11-17 Evan ChengAvoid isel movcc of large immediates when the large...
2010-11-13 Evan ChengAdd conditional move of large immediate.
2010-11-13 Evan ChengFix an obvious typo which inverted an immediate.
2010-11-12 Evan ChengAdd conditional mvn instructions.
2010-11-03 Duncan SandsSimplify uses of MVT and EVT. An MVT can be compared...
2010-11-03 Jim GrosbachBreak ARM addrmode4 (load/store multiple base address...
2010-11-01 Bob WilsonAdd support for alignment operands on VLD1-lane instruc...
2010-10-27 Evan ChengShifter ops are not always free. Do not fold them ...
2010-10-26 Jim GrosbachFirst part of refactoring ARM addrmode2 (load/store...
2010-10-21 Jim Grosbachtrailing whitespace
2010-10-19 Bob WilsonSupport alignment for NEON vld-lane and vst-lane instru...
2010-10-07 Jim GrosbachAllow use of the 16-bit literal move instruction in...
2010-10-07 Jim GrosbachAllow use of the 16-bit literal move instruction in...
2010-09-29 Jim GrosbachAdd specializations of addrmode2 that allow differentia...
2010-09-29 Jim GrosbachAdd braces for legibility.
2010-09-23 Bob WilsonSet alignment operand for NEON VST instructions.
2010-09-23 Bob WilsonSet alignment operand for NEON VLD instructions.
2010-09-21 Chris Lattnerfix a long standing wart: all the ComplexPattern's...
2010-09-14 Eric ChristopherFix QOpcode assignment to Opc.
2010-09-13 Bob WilsonConvert some VTBL and VTBX instructions to use pseudo...
2010-09-13 Bob WilsonSwitch all the NEON vld-lane and vst-lane instructions...
2010-09-05 Chris Lattnerremove some dead code. t2addrmode_imm8s4 is never...
2010-09-03 Bob WilsonFinish converting the rest of the NEON VLD instructions...
2010-09-02 Bob WilsonConvert VLD1 and VLD2 instructions to use pseudo-instru...
2010-09-01 Chris Lattnertemporarily revert r112664, it is causing a decoding...
2010-08-31 Bill WendlingWe have a chance for an optimization. Consider this...
2010-08-28 Bob WilsonUse pseudo instructions for VST1 and VST2.
2010-08-28 Bob WilsonWe don't need to custom-select VLDMQ and VSTMQ anymore.
2010-08-27 Bob WilsonChange ARM VFP VLDM/VSTM instructions to use addressing...
2010-08-26 Bob WilsonUse pseudo instructions for VST3.
2010-08-26 Bob WilsonUse pseudo instructions for VST1d64Q.
2010-08-25 Bob WilsonStart converting NEON load/stores to use pseudo instruc...
2010-08-17 Jakob Stoklund OlesenDon't call tablegen'ed Predicate_* functions in the...
2010-07-30 Evan ChengAdd -disable-shifter-op to disable isel of shifter...
2010-07-07 Bob WilsonAlso use REG_SEQUENCE for VTBX instructions.
2010-07-06 Bob WilsonUse REG_SEQUENCE nodes to make the table registers...
2010-06-29 Duncan SandsRemove an unused and a pointless variable.
2010-06-18 Dan GohmanEliminate unnecessary uses of getZExtValue().
2010-06-16 Bob WilsonRemove the hidden "neon-reg-sequence" option. The...
2010-06-04 Bob WilsonFor NEON vectors with 32- or 64-bit elements, select...
2010-06-03 Dale JohannesenEarly implementation of tail call for ARM.
2010-06-02 Jim GrosbachClean up 80 column violations. No functional change.
2010-05-28 Bob WilsonAdd the cc_out operand for t2RSBrs instructions. I...
2010-05-24 Jakob Stoklund OlesenFix a few places that depended on the numeric value...
2010-05-24 Jakob Stoklund OlesenSwitch ARMRegisterInfo.td to use SubRegIndex and elimin...
2010-05-19 Evan ChengTarget instruction selection should copy memoperands.
2010-05-17 Evan ChengTurn on -neon-reg-sequence by default.
2010-05-16 Evan ChengModel vst lane instructions with REG_SEQUENCE.
2010-05-15 Evan ChengModel 128-bit vld lane with REG_SEQUENCE.
2010-05-15 Evan ChengModel 64-bit lane vld with REG_SEQUENCE.
2010-05-14 Evan ChengModel VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
2010-05-14 Evan ChengModel VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
2010-05-14 Evan ChengFix comments.
2010-05-11 Evan ChengModel some vst3 and vst4 with reg_sequence.
2010-05-10 Evan ChengModel some vld3 instructions with REG_SEQUENCE.
2010-05-10 Evan ChengModel vld2 / vst2 with reg_sequence.
2010-05-06 Bob WilsonAdd a missing break statement to fix unintentional...
2010-05-06 Jim GrosbachFix unintentional fallthrough. Patch by Edmund Grimley...
2010-05-05 Evan ChengModel CONCAT_VECTORS of two 64-bit values as a REG_SEQU...
2010-05-04 Evan ChengWith -neon-reg-sequence, models forming a Q register...
2010-04-22 Jim GrosbachUpdate ARM DAGtoDAG for matching UBFX instruction for...
2010-04-17 Dan GohmanUse const qualifiers with TargetLowering. This eliminat...
2010-04-16 Evan ChengUse getAL() rather than a major constant.
2010-04-15 Evan ChengUse default lowering of DYNAMIC_STACKALLOC. As far...
2010-04-15 Evan ChengARM SelectDYN_ALLOC should emit a copy from SP rather...
2010-03-23 Bob WilsonFix VLDMQ and VSTMQ instructions to use the correct...
2010-03-23 Bob WilsonChange VST1 instructions for loading Q register values...
2010-03-23 Bob WilsonChange VLD1 instructions for loading Q register values...
2010-03-22 Bob WilsonRename some VLD1/VST1 instructions to match the impleme...
2010-03-20 Bob WilsonRe-commit r98683 ("remove redundant writeback flag...
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