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r70270 isn't ready yet. Back this out. Sorry for the noise.
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMInstrFormats.td
2008-11-13
Evan Cheng
Handle the rest of pseudo instructions.
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2008-11-13
Evan Cheng
Fix pre- and post-indexed load / store encoding bugs.
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2008-11-12
Evan Cheng
Consolidate formats; fix FCMPED etc. encodings.
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2008-11-12
Evan Cheng
Fix VFP conversion instruction encodings.
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2008-11-11
Evan Cheng
Fix FMDRR encoding.
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2008-11-11
Evan Cheng
Encode VFP load / store instructions.
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2008-11-11
Evan Cheng
Encode VFP conversion instructions.
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2008-11-11
Evan Cheng
Encode VFP arithmetic instructions.
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2008-11-07
Evan Cheng
Jump table JIT support. Work in progress.
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2008-11-07
Evan Cheng
Encode misc arithmetic instructions.
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2008-11-06
Evan Cheng
Encode extend instructions; more clean up.
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2008-11-06
Evan Cheng
- Improve naming consistency: Branch -> BrFrm, BranchMi...
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2008-11-06
Evan Cheng
Remove opcode from instruction TS flags; add MOVCC...
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2008-11-06
Evan Cheng
Handle smul<x><y>, smulw<y>, smla<x><y>, smlaw<y>.
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2008-11-06
Evan Cheng
Fix encoding of multiple instructions with 3 src operan...
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2008-11-05
Evan Cheng
Encode pic load / store instructions; fix some encoding...
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2008-11-05
Evan Cheng
Restructure ARM code emitter to use instruction formats...
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2008-11-04
Evan Cheng
LDM_RET restores pc, do not set 's' bit which would...
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2008-11-03
Jim Grosbach
Add binary encoding support for multiply instructions...
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2008-10-14
Jim Grosbach
Update ARM Insn encoding to get endian-ness to match...
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2008-09-17
Evan Cheng
Fix addrmode1 instruction encodings; fix bx_ret encoding.
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2008-09-17
Evan Cheng
Specify instruction encoding using range list to avoid...
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2008-09-13
Evan Cheng
Revert 56176. All those instruction formats are still...
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2008-09-12
Evan Cheng
Eliminate unnecessary instruction formats.
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2008-09-12
Evan Cheng
Addrmode 1 S bit can be dynamically set. Look for CPSR...
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2008-09-01
Evan Cheng
Control flow instruction encodings.
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2008-09-01
Evan Cheng
ldm / stm instruction encodings.
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2008-09-01
Evan Cheng
AXI2 and AXI3 instruction encodings.
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2008-09-01
Evan Cheng
Reorganize instruction formats again; AXI1 encoding.
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2008-09-01
Evan Cheng
addrmode3 instruction encodings.
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2008-09-01
Evan Cheng
Reorganize some instruction format definitions. No...
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2008-09-01
Evan Cheng
Rest of addrmode2 instruction encodings.
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2008-08-31
Evan Cheng
Addr2 word / byte load encodings.
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2008-08-31
Evan Cheng
Addr1 instructions opcodes are encoded in bits 21-24...
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2008-08-29
Evan Cheng
addrmode1 (data processing) instruction encoding: bits...
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2008-08-29
Evan Cheng
More refactoring.
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2008-08-28
Evan Cheng
Refactor ARM instruction format definitions into a...
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