Revert "Adding support for llvm.arm.neon.vaddl[su].* and"
[oota-llvm.git] / lib / Target / ARM / ARMInstrNEON.td
2011-12-09 Jim GrosbachARM assembly parsing and encoding for VLD2 with writeback.
2011-12-09 Jim GrosbachTidy up. Better base class factoring.
2011-12-09 Jim GrosbachTidy up. Better base class factoring.
2011-12-08 Jim GrosbachARM 64-bit VEXT assembly uses a .64 suffix, not .32...
2011-12-08 Jim GrosbachARM VSHR implied destination operand form aliases.
2011-12-08 Jim GrosbachARM VSUB implied destination operand form aliases.
2011-12-08 Jim GrosbachARM VQADD implied destination operand form aliases.
2011-12-08 Jim GrosbachARM a few more VMUL implied destination operand form...
2011-12-08 Jim GrosbachARM NEON two-operand aliases for VSHL(immediate).
2011-12-08 Jim GrosbachARM NEON two-operand aliases for VSHL(register).
2011-12-08 Jim GrosbachFix copy/past-o.
2011-12-08 Jim GrosbachARM NEON two-operand aliases for VMUL.
2011-12-08 Jim GrosbachARM optional destination operand variants for VEXT...
2011-12-07 Jim GrosbachARM two-operand aliases for VAND/VEOR/VORR instructions.
2011-12-07 Jim GrosbachARM two-operand aliases for VADDW instructions.
2011-12-07 Jim GrosbachARM two-operand aliases for VADD instructions.
2011-12-07 Jim GrosbachARM NEON VCLT(register) is a pseudo aliasing VCGT(regis...
2011-12-07 Jim GrosbachARM tidy up and remove no longer needed InstAlias defin...
2011-12-07 Jim GrosbachARM: NEON SHLL instruction immediate operand range...
2011-12-07 Jim GrosbachARM: Parameterize the immediate operand type for NEON...
2011-12-05 Jim GrosbachARM assembly parsing for the rest of the VMUL data...
2011-12-05 Jim GrosbachFix previous commit. Oops.
2011-12-05 Jim GrosbachTidy up. No functional change.
2011-12-05 Jim GrosbachARM assmebler parsing for two-operand VMUL instructions.
2011-12-02 Jim GrosbachARM NEON VEXT aliases for data type suffices.
2011-12-02 Jim GrosbachARM VEXT tighten up operand classes a bit.
2011-12-02 Jim GrosbachARM VST1 single lane assembly parsing.
2011-12-02 Jim GrosbachARM VLD1 single lane assembly parsing.
2011-12-02 Jim GrosbachClean up aliases for ARM VLD1 single-lane assembly...
2011-12-02 Jim GrosbachARM start parsing VLD1 single lane instructions.
2011-11-30 Jim GrosbachARM parsing for VLD1 all lanes, with writeback.
2011-11-30 Jim GrosbachARM parsing for VLD1 two register all lanes, no writeback.
2011-11-30 Jim GrosbachARM parsing aliases for VLD1 single register all lanes.
2011-11-29 Jim GrosbachTidy up a bit.
2011-11-29 Jim GrosbachAdd comment.
2011-11-29 Jim GrosbachARM parsing aliases for data-size suffices on VST1.
2011-11-29 Jim GrosbachARM assembly parsing and encoding for four-register...
2011-11-29 Jim GrosbachARM assembly parsing and encoding for three-register...
2011-11-15 Jim GrosbachARM assembly parsing for data type suffices on NEON...
2011-11-15 Jim GrosbachARM alternate size suffices for VTRN instructions.
2011-11-15 Owen AndersonFix an ambiguous decoding where we failed to properly...
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for register-write...
2011-11-15 Evan ChengAdd vmov.f32 to materialize f32 immediate splats which...
2011-11-15 Jim GrosbachARM parsing datatype suffix variants for fixed-writebac...
2011-11-14 Jim GrosbachARM parsing datatype suffix variants for non-writeback...
2011-11-14 Jim GrosbachARM parsing datatype suffix variants for non-writeback...
2011-11-14 Jim GrosbachAdd explanatory comment.
2011-11-14 Jim GrosbachARM parsing optional datatype suffix for VAND/VEOR...
2011-11-12 Jim GrosbachRe-apply 144430, this time with the associated isel...
2011-11-11 Jim GrosbachOops. Missed the isel half of this. revert while I...
2011-11-11 Jim GrosbachARM assembly parsing for VST1 two-register encoding.
2011-10-31 Jim GrosbachARM VST1 w/ writeback assembly parsing and encoding.
2011-10-28 Owen AndersonSpecify that the high bit of the alignment field is...
2011-10-25 Jim GrosbachARM assembly parsing and encoding for VLD1 with writeback.
2011-10-24 Jim GrosbachNuke dead code. Nothing generates the VLD1d64QPseudo_UP...
2011-10-24 Jim GrosbachARM assembly parsing and encoding for VLD1 w/ writeback.
2011-10-24 Jim GrosbachARM assembly parsing and encoding for VLD1 w/ writeback.
2011-10-24 Jim GrosbachARM refactor am6offset usage for VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 4-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 2-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 4-register variant of VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 3-register variant of VLD1.
2011-10-21 Jim GrosbachARM VLD parsing and encoding.
2011-10-21 Jim GrosbachRemove some outdated comments.
2011-10-20 Jim GrosbachARM VLD1/VST1 (one register, no writeback) assembly...
2011-10-20 Jim GrosbachARM VTBX (one register) assembly parsing and encoding.
2011-10-18 Jim GrosbachARM VTBL (one register) assembly parsing and encoding.
2011-10-18 Jim GrosbachYet more ARM NEON assembly parsing for the lane index...
2011-10-18 Jim GrosbachARM vmla/vmls assembly parsing for the lane index operand.
2011-10-18 Jim GrosbachARM vmov assembly parsing for the lane index operand.
2011-10-18 Jim GrosbachARM vmla/vmls assembly parsing for the lane index operand.
2011-10-18 Jim GrosbachARM vqdmulh assembly parsing for the lane index operand.
2011-10-18 Jim GrosbachARM vmul assembly parsing for the lane index operand.
2011-10-18 Jim GrosbachARM vqdmlal assembly parsing for the lane index operand.
2011-10-18 Jim GrosbachARM assembly parsing and encoding for VMOV.i64.
2011-10-18 Jim GrosbachARM assembly parsing and encoding for VMOV/VMVN/VORR...
2011-10-17 Jim GrosbachARM assembly parsing and encoding for VMOV/VMVN/VORR...
2011-10-17 Jim GrosbachARM NEON "vmov.i8" immediate assembly parsing and encoding.
2011-10-17 Jim GrosbachTidy up organization.
2011-10-07 Jim GrosbachARM NEON assembly parsing and encoding for VDUP(scalar).
2011-08-20 Chad RosierRemove the VMOVQQ pseudo instruction.
2011-08-20 Chad RosierRemove VMOVQQQQ pseudo instruction.
2011-08-15 Owen AndersonSpecify a necessary fixed bit for VLD3DUP, and otherwis...
2011-08-15 Owen AndersonFix problems decoding the to/from-lane NEON memory...
2011-08-09 Owen AndersonReplace the existing ARM disassembler with a new one...
2011-08-05 Bob WilsonAdd missing register constraint for some VLD3/VLD4...
2011-07-15 Owen AndersonRemove VMOVDneon and VMOVQ, which are just aliases...
2011-07-15 Owen AndersonRemove unnecessary duplicate instruction definitions...
2011-06-13 Jim GrosbachClean up a few 80 column violations.
2011-06-02 Tanya LattnerFix encoding for VEXTdf.
2011-05-09 Mon P WangFixed MC encoding for index_align for VLD1/VST1 (single...
2011-04-07 Mon P WangFixed encoding for VEXTqf
2011-03-30 Owen AndersonSomehow we managed to forget to encode the lane index...
2011-03-30 Cameron ZwarichAdd a ARM-specific SD node for VBSL so that forms with...
2011-03-29 Owen AndersonGet rid of the non-writeback versions VLDMDB and VSTMDB...
2011-03-11 Jim GrosbachARM VDUPfd and VDUPfq can just be patterns. The instruc...
2011-03-11 Jim GrosbachARM VDUPLNfq and VDUPLNfd definitions can just be Pat...
2011-03-11 Jim GrosbachARM VREV64df and VREV64qf can just be patterns. The...
2011-03-09 Bill Wendling* Correct encoding for VSRI.
2011-03-09 Bill WendlingCorrect the encoding for VRSRA and VSRA instructions.
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