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Fix a register-class comparison bug in PPCCTRLoops
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMInstrThumb.td
2012-11-06
Chad Rosier
Mark the Int_eh_sjlj_dispatchsetup pseudo instruction...
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2012-10-30
Jim Grosbach
ARM: Better disassembly for pc-relative LDR.
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2012-09-27
Sylvestre Ledru
Revert 'Fix a typo 'iff' => 'if''. iff is an abreviatio...
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2012-09-27
Sylvestre Ledru
Fix a typo 'iff' => 'if'
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2012-08-28
Jakob Stoklund Olesen
Revert r162713: "Add ATOMIC_LDR* pseudo-instructions...
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2012-08-27
Jakob Stoklund Olesen
Add ATOMIC_LDR* pseudo-instructions to model atomic_loa...
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2012-08-24
Jakob Stoklund Olesen
Missed tLEApcrelJT.
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2012-07-13
Jakob Stoklund Olesen
Remove variable_ops from ARM call instructions.
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2012-06-23
Evan Cheng
(sub X, imm) gets canonicalized to (add X, -imm)
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2012-06-02
Benjamin Kramer
Fix typos found by github.com/lyda/misspell-check
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2012-05-03
Kevin Enderby
Fix issues with the ARM bl and blx thumb instructions...
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2012-05-02
Richard Barton
Disallow YIELD and other allocated nop hints in pre...
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2012-04-27
Jim Grosbach
ARM: Thumb add(sp plus register) asm constraints.
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2012-04-27
Jim Grosbach
ARM: Tweak tADDrSP definition for consistent operand...
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2012-04-11
Jim Grosbach
ARM add missing Thumb1 two-operand aliases for shift...
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2012-04-06
Jakob Stoklund Olesen
Eliminate iOS-specific tail call instructions.
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2012-04-06
Jakob Stoklund Olesen
Deduplicate ARM call-related instructions.
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2012-04-05
Jim Grosbach
ARM assembly aliases for add negative immediates using...
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2012-02-24
Jakob Stoklund Olesen
Switch ARM target to register masks.
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2012-02-09
James Molloy
Teach the MC and disassembler about SoftFail, and hook...
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2012-01-18
Jim Grosbach
Rename pattern for clarity.
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2012-01-13
Jakob Stoklund Olesen
Use RegisterTuples to generate pseudo-registers.
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2011-12-22
Bob Wilson
Add variants of the dispatchsetup pseudo for Thumb...
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2011-12-20
Evan Cheng
ARM target code clean up. Check for iOS, not Darwin...
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2011-12-13
Jim Grosbach
ARM pre-UAL NEG mnemonic for convenience when porting...
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2011-10-17
Bill Wendling
Now Igor, throw the switch...give my creation life!
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2011-10-15
Jakob Stoklund Olesen
Mark tADDrSPi as having side effects again.
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2011-10-14
Jakob Stoklund Olesen
Ban rematerializable instructions with side effects.
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2011-09-20
Jim Grosbach
Thumb1 convenience aliases for disassembler round-trip...
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2011-09-20
Jim Grosbach
Thumb CPS definition is not disassembler only.
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2011-09-16
Jim Grosbach
Thumb2 assembly parsing and encoding for SUB(immediate).
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2011-09-15
Eli Friedman
Use a more efficient lowering for Unordered/Monotonic...
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2011-09-09
Owen Anderson
Thumb unconditional branches are allowed in IT blocks...
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2011-08-24
Jim Grosbach
Thumb parsing and encoding for SUB (SP minu immediate).
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2011-08-24
Jim Grosbach
Thumb parsing and encoding support for ADD SP instructions.
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2011-08-24
Jim Grosbach
Add missing explicit writeback operand to tSTMIA_UPD.
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2011-08-24
Jim Grosbach
Thumb add SP assembly syntax fix.
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2011-08-24
Jim Grosbach
Thumb1 ADD/SUB SP instructions are predicable in Thumb2...
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2011-08-23
Jim Grosbach
Thumb parsing and encoding for SVC.
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2011-08-23
Jim Grosbach
Thumb parsing and encoding for tSTRspi.
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2011-08-23
Jim Grosbach
Clean up Thumb load/store multiple definitions.
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2011-08-22
Jim Grosbach
Revert r138278 now that r138289 has fixed the root...
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2011-08-22
Jim Grosbach
Temporarilly mark tMUL as not commutable.
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2011-08-22
Jim Grosbach
Clean up predicates on ARM target instruction aliases.
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2011-08-19
Jim Grosbach
Thumb parsing and encoding support for NOP.
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2011-08-19
Jim Grosbach
Fix NEG alias
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2011-08-19
Jim Grosbach
Update tests.
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for MUL.
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for MOV.
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for LSL(immediate).
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for LDRSB and LDRSH.
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for LDRH.
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for LDRB.
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for LDR(immediate...
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2011-08-19
Jim Grosbach
Thumb assembly parsing and encoding for LDR(immediate...
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2011-08-19
Jim Grosbach
Add explanatory comment.
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2011-08-18
Jim Grosbach
Thumb assembly parsing and encoding for LDM instruction.
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2011-08-18
Jim Grosbach
Thumb assembly parsing and encoding for CMP.
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2011-08-18
Jim Grosbach
Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.
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2011-08-18
Jim Grosbach
80 columns.
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2011-08-17
Jim Grosbach
Clean up patterns for Thumb1 system instructions.
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2011-08-17
Jim Grosbach
ARM clean up the imm_sr operand class representation.
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2011-08-17
Jim Grosbach
Thumb assembly parsing and encoding for ADR.
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2011-08-16
Jim Grosbach
Thumb ADD(immediate) parsing support.
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2011-08-15
Owen Anderson
Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch...
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2011-08-09
Owen Anderson
Replace the existing ARM disassembler with a new one...
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2011-08-08
Owen Anderson
Thumb1 BL instructions encoding 22 bits of displacement...
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2011-08-08
Owen Anderson
Fix encodings for Thumb ASR and LSR immediate operands...
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2011-08-03
Jim Grosbach
ARM refactoring assembly parsing of memory address...
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2011-08-03
Owen Anderson
Fix broken encoding of tCBNZ.
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2011-08-01
Jim Grosbach
Move imm0_255 to ARMInstrInfo.td with the other immedia...
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2011-07-26
Jim Grosbach
ARM parsing and encoding for SVC instruction.
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2011-07-22
Jim Grosbach
Thumb assembly support for SETEND instruction.
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2011-07-18
Owen Anderson
Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD...
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2011-07-18
Owen Anderson
Mark the Darwin assembler workout as isCodeGenOnly...
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2011-07-18
Owen Anderson
Re-apply r135319 with a fix for the constant island...
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2011-07-16
Owen Anderson
Revert r135319 in an attempt to get to unbreak testers.
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2011-07-15
Owen Anderson
Get rid of the separate opcodes for the Darwin versions...
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2011-07-14
Benjamin Kramer
Add OperandTypes for Thumb branch targets.
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2011-07-13
Owen Anderson
Add a target-indepedent entry to MCInstrDesc to describ...
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2011-07-13
Jim Grosbach
Range checking for CDP[2] immediates.
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2011-07-13
Jim Grosbach
Fix predicates for Thumb co-processor instructions.
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2011-07-08
Jim Grosbach
Mark tBRIND as predicable.
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2011-07-08
Jim Grosbach
Pseudo-ize tBRIND.
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2011-07-08
Jim Grosbach
Make tBX_RET and tBX_RET_vararg predicable.
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2011-07-08
Jim Grosbach
Pseudo-ize tBX_RET and tBX_RET_vararg.
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2011-07-08
Jim Grosbach
Shuffle productions around a bit.
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2011-07-08
Jim Grosbach
Use tPseudoExpand for tTAILJMPrND and tTAILJMPr.
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2011-07-08
Jim Grosbach
Use tPseudoExpand for tTAILJMPd and tTAILJMPdND.
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2011-07-08
Jim Grosbach
Move Thumb tail call pseudos to Thumb.td file.
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2011-07-08
Jim Grosbach
Use TableGen'erated pseudo lowering for ARM.
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2011-07-01
Jim Grosbach
Pseudo-ize t2MOVCC[ri].
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2011-06-30
Jim Grosbach
Refact ARM Thumb1 tMOVr instruction family.
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2011-06-30
Jim Grosbach
Thumb1 register to register MOV instruction is predicable.
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2011-06-30
Jim Grosbach
Pseudo-ize the Thumb tTPsoft instruction.
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2011-06-30
Jim Grosbach
Pseudo-ize the Thumb tPOP_RET instruction.
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2011-06-29
Jim Grosbach
Refactor away tSpill and tRestore pseudos in ARM backend.
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2011-06-27
Jim Grosbach
ARM Assembly support for Thumb mov-immediate.
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2011-06-21
Evan Cheng
Teach dag combine to match halfword byteswap patterns.
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