Separate itinerary classes for mvn from mov; for tst / teq from cmp / cmn.
[oota-llvm.git] / lib / Target / ARM / ARMScheduleA9.td
2010-09-29 Evan ChengSeparate itinerary classes for mvn from mov; for tst...
2010-09-29 Evan ChengAssign bitwise binary instructions different itinerary...
2010-09-28 Evan ChengAdd support to model pipeline bypass / forwarding.
2010-09-25 Evan ChengFix IIC_iEXTAr itinerary class of Cortex-A9.
2010-09-25 Evan ChengRemove a unused instruction itinerary class.
2010-09-25 Evan ChengFix zero and sign extension instructions scheduling...
2010-09-24 Evan ChengMore pseudo instruction scheduling itinerary fixes.
2010-09-24 Evan ChengFix scheduling itinerary for pseudo mov immediate instr...
2010-09-08 Evan ChengFix LDM_RET schedule itinery.
2010-06-28 Jim Grosbachminor housekeeping cleanup: 80-column, trailing whitesp...
2010-05-29 Anton KorobeynikovSome A9 load/store cleanups
2010-05-29 Anton KorobeynikovSome rough approximations for load/stores on A9
2010-05-29 Anton KorobeynikovNEON/VFP stuff can be issued only via Pipe1 on A9
2010-05-29 Anton KorobeynikovAdd some integer instruction itineraries for A9
2010-04-18 Anton KorobeynikovMake processor FUs unique for given itinerary. This...
2010-04-07 Anton KorobeynikovSplit A8/A9 itins - they already were too big.