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First part of refactoring ARM addrmode2 (load/store) instructions to be more
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
ARMScheduleA9.td
2010-10-21
Andrew Trick
putback r116983 and fix simple-fp-encoding.ll tests
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2010-10-21
Owen Anderson
Revert r116983, which is breaking all the buildbots.
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2010-10-21
Evan Cheng
Add missing scheduling itineraries for transfers betwee...
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2010-10-13
Evan Cheng
Limit load / store issues (at least until we have a...
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2010-10-11
Evan Cheng
More ARM scheduling itinerary fixes.
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2010-10-11
Evan Cheng
Proper VST scheduling itineraries.
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2010-10-09
Evan Cheng
Add VLD4 scheduling itineraries.
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2010-10-09
Evan Cheng
Finish vld3 and vld4.
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2010-10-09
Evan Cheng
Correct some load / store instruction itinerary mistakes:
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2010-10-07
Evan Cheng
Model operand cycles of vldm / vstm; also fixes schedul...
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2010-10-06
Evan Cheng
- Add TargetInstrInfo::getOperandLatency() to compute...
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2010-10-03
Evan Cheng
Major changes to Cortex-A9 itinerary.
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2010-10-01
Evan Cheng
Fix r115332: correctly model AGU / NEON mux.
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2010-10-01
Evan Cheng
Add operand cycles for vldr / vstr.
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2010-10-01
Evan Cheng
NEON scheduling info fix. vmov reg, reg are single...
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2010-10-01
Evan Cheng
Per Cortex-A9 pipeline diagram. AGU (core load / store...
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2010-09-30
Evan Cheng
ARM instruction itinerary fixes:
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2010-09-29
Evan Cheng
Model Cortex-a9 load to SUB, RSB, ADD, ADC, SBC, RSC...
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2010-09-29
Evan Cheng
Separate itinerary classes for mvn from mov; for tst...
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2010-09-29
Evan Cheng
Assign bitwise binary instructions different itinerary...
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2010-09-28
Evan Cheng
Add support to model pipeline bypass / forwarding.
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2010-09-25
Evan Cheng
Fix IIC_iEXTAr itinerary class of Cortex-A9.
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2010-09-25
Evan Cheng
Remove a unused instruction itinerary class.
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2010-09-25
Evan Cheng
Fix zero and sign extension instructions scheduling...
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2010-09-24
Evan Cheng
More pseudo instruction scheduling itinerary fixes.
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2010-09-24
Evan Cheng
Fix scheduling itinerary for pseudo mov immediate instr...
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2010-09-08
Evan Cheng
Fix LDM_RET schedule itinery.
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2010-06-28
Jim Grosbach
minor housekeeping cleanup: 80-column, trailing whitesp...
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2010-05-29
Anton Korobeynikov
Some A9 load/store cleanups
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2010-05-29
Anton Korobeynikov
Some rough approximations for load/stores on A9
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2010-05-29
Anton Korobeynikov
NEON/VFP stuff can be issued only via Pipe1 on A9
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2010-05-29
Anton Korobeynikov
Add some integer instruction itineraries for A9
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2010-04-18
Anton Korobeynikov
Make processor FUs unique for given itinerary. This...
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2010-04-07
Anton Korobeynikov
Split A8/A9 itins - they already were too big.
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