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[oota-llvm.git] / lib / Target / ARM /
2013-06-18 David BlaikieReduce indentation. tree | commitdiff
2013-06-18 Amaury de la VieuvilleARM: fix literal load with positive offset encoding tree | commitdiff
2013-06-18 Amaury de la VieuvilleARM: add operands pre-writeback variants when needed tree | commitdiff
2013-06-18 Amaury de la VieuvilleARM: fix thumb literal loads decoding tree | commitdiff
2013-06-18 Amaury de la VieuvilleARM: thumb stores cannot use PC as dest register tree | commitdiff
2013-06-18 Bill WendlingUse pointers to the MCAsmInfo and MCRegInfo. tree | commitdiff
2013-06-16 David BlaikieDebugInfo: remove target-specific Frame Index handling... tree | commitdiff
2013-06-16 David BlaikieDebug Info: Simplify Frame Index handling in DBG_VALUE... tree | commitdiff
2013-06-15 Andrew TrickUpdate machine models. Specify buffer sizes for OOO... tree | commitdiff
2013-06-15 Andrew TrickMachine Model: Add MicroOpBufferSize and resource Buffe... tree | commitdiff
2013-06-14 Amaury de la VieuvilleARM: fix thumb coprocessor instruction with pre-writeba... tree | commitdiff
2013-06-14 JF BastienEnable FastISel on ARM for Linux and NaCl, not MCJIT tree | commitdiff
2013-06-13 Amaury de la VieuvilleARM: fix B decoding tree | commitdiff
2013-06-13 Amaury de la VieuvilleARM: fix t2am_imm8_offset operand printing for imm=#-0 tree | commitdiff
2013-06-11 JF BastienARM FastISel fix sext/zext fold tree | commitdiff
2013-06-11 NAKAMURA TakumiRework r183728, suppress assert(0) for now. Its behavio... tree | commitdiff
2013-06-11 Mihai PopaIt adds support for negative zero offsets for loads... tree | commitdiff
2013-06-11 Mihai PopaThis patch adds support for FPINST/FPINST2 as operands... tree | commitdiff
2013-06-11 Amaury de la VieuvilleARM: Enforce decoding rules for VLDn instructions tree | commitdiff
2013-06-11 Amaury de la VieuvilleARM: Fix STREX/LDREX reecoding tree | commitdiff
2013-06-11 NAKAMURA TakumiTweak a couple of tests on win32 hosts with +Asserts. tree | commitdiff
2013-06-11 NAKAMURA TakumiARMAsmBackend.cpp: Use Triple::isOSBinFormatCOFF()... tree | commitdiff
2013-06-11 NAKAMURA TakumiWhitespace. tree | commitdiff
2013-06-10 Tim NorthoverARM: diagnose ARM/Thumb assembly switches on CPUs only... tree | commitdiff
2013-06-10 Aaron BallmanSilencing an MSVC warning about comparing signed and... tree | commitdiff
2013-06-10 Amaury de la VieuvilleFix misleading comments in ARMAsmParser tree | commitdiff
2013-06-10 Amaury de la VieuvilleARM: ISB cannot be passed the same options as DMB tree | commitdiff
2013-06-09 Logan ChienFix ARM unwind opcode assembler in several cases. tree | commitdiff
2013-06-09 JF BastienARM FastISel fix load register classes tree | commitdiff
2013-06-08 Amaury de la VieuvilleARM: fix VMOVvnf32 decoding when ambiguous with VCVT tree | commitdiff
2013-06-08 Amaury de la VieuvilleARM: enforce SRS decoding constraints tree | commitdiff
2013-06-08 Amaury de la VieuvilleARM: fix CPS decoding when ambiguous with QADD tree | commitdiff
2013-06-08 Amaury de la VieuvilleARM: fix VCVT decoding tree | commitdiff
2013-06-08 JF BastienFix unused variable warning from my previous patch. tree | commitdiff
2013-06-07 JF BastienARM FastISel integer sext/zext improvements tree | commitdiff
2013-06-07 Bill WendlingDon't cache the instruction and register info from... tree | commitdiff
2013-06-07 Arnold SchwaighoferARM sched model: Use the right resources for DIV tree | commitdiff
2013-06-07 Arnold SchwaighoferARM sched model: Add VFP div instruction on Swift tree | commitdiff
2013-06-07 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions... tree | commitdiff
2013-06-06 Arnold SchwaighoferRevert "ARM sched model: Add SIMD/VFP load/store instru... tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions... tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add integer VFP/SIMD instructions... tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add integer load/store instructions... tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add integer arithmetic instructions... tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Cortex A9 - More InstRW sched resources tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb instructions tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add branch instructions tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add preload instructions tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb instructions tree | commitdiff
2013-06-06 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb2 instructions tree | commitdiff
2013-06-06 Bill WendlingCache the TargetLowering info object as a pointer. tree | commitdiff
2013-06-05 Arnold SchwaighoferARM sched model: Add more ALU and CMP instructions tree | commitdiff
2013-06-05 Arnold SchwaighoferARM sched model: Add divsion, loads, branches, vfp cvt tree | commitdiff
2013-06-05 Arnold SchwaighoferARMInstrInfo: Improve isSwiftFastImmShift tree | commitdiff
2013-06-05 Mihai PopaThis is a simple patch that changes RRX and RRXS to... tree | commitdiff
2013-06-04 Evan ChengCortex-R5 can issue Thumb2 integer division instructions. tree | commitdiff
2013-06-04 Arnold SchwaighoferRevert series of sched model patches until I figure... tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add VFP div instruction on Swift tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add SIMD/VFP load/store instructions... tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add integer VFP/SIMD instructions... tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add integer load/store instructions... tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add integer arithmetic instructions... tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Cortex A9 - More InstRW sched resources tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add branch thumb instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add branch thumb2 instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add branch instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add preload thumb2 instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add preload instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add more ALU and CMP thumb instructions tree | commitdiff
2013-06-04 Arnold Schwaighofer ARM sched model: Add more ALU and CMP thumb2 instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add more ALU and CMP instructions tree | commitdiff
2013-06-04 Arnold SchwaighoferARM sched model: Add divsion, loads, branches, vfp cvt tree | commitdiff
2013-06-04 Arnold SchwaighoferARMInstrInfo: Improve isSwiftFastImmShift tree | commitdiff
2013-06-04 David MajnemerARM: Fix crash in ARM backend inside of ARMConstantIsla... tree | commitdiff
2013-05-31 Ahmed BougachaAdd a way to define the bit range covered by a SubRegIndex. tree | commitdiff
2013-05-31 Tim NorthoverARM: permit upper-case BE/LE on setend instruction tree | commitdiff
2013-05-31 Tim NorthoverARM: add fstmx and fldmx instructions for assembly tree | commitdiff
2013-05-31 Tim NorthoverARM: fix VEXT encoding corner case tree | commitdiff
2013-05-30 Rafael EspindolaRevert r182937 and r182877. tree | commitdiff
2013-05-29 Andrew TrickOrder CALLSEQ_START and CALLSEQ_END nodes. tree | commitdiff
2013-05-29 JF BastienEnable FastISel on ARM for Linux and NaCl tree | commitdiff
2013-05-29 JF BastienTidy some register classes for ARM and Thumb tree | commitdiff
2013-05-25 Andrew TrickTrack IR ordering of SelectionDAG nodes 2/4. tree | commitdiff
2013-05-24 Quentin ColombetFollow up of the introduction of MCSymbolizer. tree | commitdiff
2013-05-24 Michael J. SpencerReplace Count{Leading,Trailing}Zeros_{32,64} with count... tree | commitdiff
2013-05-24 Benjamin KramerRemove the Copied parameter from MemoryObject::readBytes. tree | commitdiff
2013-05-24 Ahmed BougachaMC: Disassembled CFG reconstruction. tree | commitdiff
2013-05-24 Ahmed BougachaAdd MCSymbolizer for symbolic/annotated disassembly. tree | commitdiff
2013-05-23 Tim NorthoverARM: implement @llvm.readcyclecounter intrinsic tree | commitdiff
2013-05-23 Tim NorthoverARM: Add Performance Monitor Extensions feature tree | commitdiff
2013-05-22 Chad RosierSimplify logic now that r182490 is in place. No functi... tree | commitdiff
2013-05-20 Mihai PopaVSTn instructions have a number of encoding constraints... tree | commitdiff
2013-05-20 Mihai PopaQ registers are encoded in fields of the same length... tree | commitdiff
2013-05-20 Stepan DyatkovskiyPR15868 fix. tree | commitdiff
2013-05-19 Benjamin KramerReplace some bit operations with simpler ones. No funct... tree | commitdiff
2013-05-18 Matt ArsenaultAdd LLVMContext argument to getSetCCResultType tree | commitdiff
2013-05-17 JF BastienSupport unaligned load/store on more ARM targets tree | commitdiff
2013-05-15 Derek SchuffRevert "Support unaligned load/store on more ARM targets" tree | commitdiff
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