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Skip identical instruction while calculating DBG_VALUE range.
[oota-llvm.git]
/
lib
/
Target
/
ARM
/
2010-06-02
Bob Wilson
Rename canCombinedSubRegIndex method to something more...
tree
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commitdiff
2010-06-02
Rafael Espindola
Replace ARM's getCalleeSavedRegClasses with a simpler...
tree
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commitdiff
2010-05-29
Anton Korobeynikov
Some A9 load/store cleanups
tree
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commitdiff
2010-05-29
Anton Korobeynikov
Some rough approximations for load/stores on A9
tree
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commitdiff
2010-05-29
Anton Korobeynikov
NEON/VFP stuff can be issued only via Pipe1 on A9
tree
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commitdiff
2010-05-29
Anton Korobeynikov
Add some integer instruction itineraries for A9
tree
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commitdiff
2010-05-28
Evan Cheng
Schedule high latency instructions for latency reductio...
tree
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commitdiff
2010-05-28
Jim Grosbach
correct retattr
tree
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commitdiff
2010-05-28
Jim Grosbach
Cosmetic cleanup. No functional change.
tree
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commitdiff
2010-05-28
Jim Grosbach
make sure accesses to set up the jmpbuf don't get moved...
tree
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commitdiff
2010-05-28
Bob Wilson
Add the cc_out operand for t2RSBrs instructions. I...
tree
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commitdiff
2010-05-27
Jim Grosbach
Update the saved stack pointer in the sjlj function...
tree
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commitdiff
2010-05-27
Evan Cheng
Use report_fatal_error, not llvm_unreachable.
tree
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commitdiff
2010-05-27
Jim Grosbach
back out 104862/104869. Can reuse stacksave after all...
tree
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commitdiff
2010-05-27
Evan Cheng
llvm can't correctly support 'H', 'Q' and 'R' modifiers...
tree
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commitdiff
2010-05-27
Bob Wilson
Fix some bad fall-throughs in a switch statement. ...
tree
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commitdiff
2010-05-27
Jim Grosbach
add ISD::STACKADDR to get the current stack pointer...
tree
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commitdiff
2010-05-26
Jakob Stoklund Olesen
Give SubRegIndex names to all ARM subregisters. This...
tree
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commitdiff
2010-05-26
Jim Grosbach
Adjust eh.sjlj.setjmp to properly have a chain and...
tree
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commitdiff
2010-05-26
Jakob Stoklund Olesen
Replace the SubRegSet tablegen class with a less error...
tree
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commitdiff
2010-05-26
Shih-wei Liao
Coding style change (Adding 1 missing space.)
tree
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commitdiff
2010-05-26
Shih-wei Liao
Adding the missing implementation for ARM::SBFX and...
tree
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commitdiff
2010-05-26
Jim Grosbach
fix off by 1 (insn) error in eh.sjlj.setjmp thumb code...
tree
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commitdiff
2010-05-26
Jakob Stoklund Olesen
Revert "Replace the SubRegSet tablegen class with a...
tree
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commitdiff
2010-05-26
Jakob Stoklund Olesen
Replace the SubRegSet tablegen class with a less error...
tree
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commitdiff
2010-05-26
Shih-wei Liao
Adding the missing implementation of Bitfield's "clear...
tree
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commitdiff
2010-05-26
Shih-wei Liao
To handle s* registers in emitVFPLoadStoreMultipleInstr...
tree
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commitdiff
2010-05-25
Jakob Stoklund Olesen
Remove NumberHack entirely.
tree
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commitdiff
2010-05-25
Zonr Chang
Add missing implementation to the materialization of...
tree
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commitdiff
2010-05-25
Zonr Chang
Add support to MOVimm32 using movt/movw for ARM JIT
tree
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commitdiff
2010-05-25
Bob Wilson
Allow t2MOVsrl_flag and t2MOVsra_flag instructions...
tree
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commitdiff
2010-05-25
Bob Wilson
Fix up instruction classes for Thumb2 RSB instructions...
tree
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commitdiff
2010-05-25
Bob Wilson
Clean up indentation.
tree
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commitdiff
2010-05-25
Jakob Stoklund Olesen
Use enums instead of literals in the ARM backend.
tree
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commitdiff
2010-05-24
Jakob Stoklund Olesen
Switch SubRegSet to using symbolic SubRegIndices
tree
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commitdiff
2010-05-24
Bob Wilson
Allow Thumb2 MVN instructions to set condition codes...
tree
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commitdiff
2010-05-24
Jakob Stoklund Olesen
Lose the dummies
tree
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commitdiff
2010-05-24
Jakob Stoklund Olesen
Replace the tablegen RegisterClass field SubRegClassLis...
tree
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commitdiff
2010-05-24
Bob Wilson
Clean up some extra whitespace.
tree
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commitdiff
2010-05-24
Bob Wilson
Thumb2 RSBS instructions were being printed without...
tree
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commitdiff
2010-05-24
Evan Cheng
LR is in GPR, not tGPR even in Thumb1 mode.
tree
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commitdiff
2010-05-24
Jakob Stoklund Olesen
Fix a few places that depended on the numeric value...
tree
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commitdiff
2010-05-24
Jakob Stoklund Olesen
Switch ARMRegisterInfo.td to use SubRegIndex and elimin...
tree
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commitdiff
2010-05-23
Bob Wilson
VDUP doesn't support vectors with 64-bit elements.
tree
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commitdiff
2010-05-22
Evan Cheng
Implement @llvm.returnaddress. rdar://8015977.
tree
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commitdiff
2010-05-22
Jim Grosbach
Implement eh.sjlj.longjmp for ARM. Clean up the intrins...
tree
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commitdiff
2010-05-22
Bob Wilson
Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that...
tree
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commitdiff
2010-05-21
Evan Cheng
Change ARM scheduling default to list-hybrid if the...
tree
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commitdiff
2010-05-20
Evan Cheng
Allow targets more controls on what nodes are scheduled...
tree
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commitdiff
2010-05-20
Bob Wilson
Handle Neon v2f64 and v2i64 vector shuffles as register...
tree
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commitdiff
2010-05-19
Evan Cheng
Code refactoring: pull SchedPreference enum from Target...
tree
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commitdiff
2010-05-19
Evan Cheng
t2LEApcrel and tLEApcrel are re-materializable. This...
tree
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commitdiff
2010-05-19
Evan Cheng
Use 'adr' for LEApcrel and LEApcrel. Mark LEApcrel...
tree
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commitdiff
2010-05-19
Evan Cheng
Mark pattern-less mayLoad / mayStore instructions never...
tree
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commitdiff
2010-05-19
Evan Cheng
Target instruction selection should copy memoperands.
tree
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commitdiff
2010-05-19
Evan Cheng
Mark a few more pattern-less instructions with neverHas...
tree
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commitdiff
2010-05-18
Evan Cheng
Sink dag combine's post index load / store code that...
tree
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commitdiff
2010-05-17
Jakob Stoklund Olesen
ARMBaseRegisterInfo::estimateRSStackSizeLimit() could...
tree
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commitdiff
2010-05-17
Evan Cheng
vmov of immediates are trivially re-materializable.
tree
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commitdiff
2010-05-17
Bob Wilson
Fix a regression in 464.h264 for thumb1 and thumb2...
tree
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commitdiff
2010-05-17
Evan Cheng
Turn on -neon-reg-sequence by default.
tree
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commitdiff
2010-05-17
Evan Cheng
No reason not to run the NEON domain croassing fix...
tree
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commitdiff
2010-05-16
Anton Korobeynikov
Chris said that the comment char should be escaped...
tree
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commitdiff
2010-05-16
Anton Korobeynikov
Generalize the ARM DAG combiner of mul with constants...
tree
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commitdiff
2010-05-16
Evan Cheng
Model vst lane instructions with REG_SEQUENCE.
tree
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commitdiff
2010-05-15
Anton Korobeynikov
Some cheap DAG combine goodness for multiplication...
tree
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commitdiff
2010-05-15
Anton Korobeynikov
"trap" pseudo-op turned out to be apple-local.
tree
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commitdiff
2010-05-15
Evan Cheng
Model 128-bit vld lane with REG_SEQUENCE.
tree
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commitdiff
2010-05-15
Evan Cheng
v4i64 and v8i64 are only synthesizable when NEON is...
tree
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commitdiff
2010-05-15
Evan Cheng
Allow TargetLowering::getRegClassFor() to be called...
tree
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commitdiff
2010-05-15
Evan Cheng
Model 64-bit lane vld with REG_SEQUENCE.
tree
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commitdiff
2010-05-14
Evan Cheng
Teach two-address pass to do some coalescing while...
tree
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commitdiff
2010-05-14
Evan Cheng
Model VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
tree
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commitdiff
2010-05-14
Bill Wendling
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack...
tree
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commitdiff
2010-05-14
Evan Cheng
Model VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
tree
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commitdiff
2010-05-14
Evan Cheng
Added a QQQQ register file to model 4-consecutive Q...
tree
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commitdiff
2010-05-14
Evan Cheng
Fix comments.
tree
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commitdiff
2010-05-13
Evan Cheng
Add comment about the pseudo registers QQ, each of...
tree
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commitdiff
2010-05-13
Bob Wilson
Fix pr7110: For non-Darwin targets UnspilledCS1GPRs...
tree
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commitdiff
2010-05-13
Daniel Dunbar
Fix -Asserts warning.
tree
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commitdiff
2010-05-13
Evan Cheng
Bring back VLD1q and VST1q and use them for reloading...
tree
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commitdiff
2010-05-13
Evan Cheng
Expand VMOVQQ into a pair of VMOVQ.
tree
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commitdiff
2010-05-13
Evan Cheng
Mark some pattern-less instructions as neverHasSideEffects.
tree
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commitdiff
2010-05-12
Evan Cheng
Fix some potential issues in the pseudo instruction...
tree
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commitdiff
2010-05-12
Evan Cheng
Remove a dead fixme.
tree
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commitdiff
2010-05-12
Rafael Espindola
Add support for movi32 of global values to the new...
tree
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commitdiff
2010-05-12
Evan Cheng
vst instructions are modeled as this:
tree
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commitdiff
2010-05-11
Evan Cheng
Avoid breaking vstd when reg_sequence is not used.
tree
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commitdiff
2010-05-11
Duncan Sands
I got tired of VISIBILITY_HIDDEN colliding with the...
tree
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commitdiff
2010-05-11
Dan Gohman
Implement a bunch more TargetSelectionDAGInfo infrastru...
tree
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commitdiff
2010-05-11
Dan Gohman
Remove the TargetLowering::getSubtarget() virtual funct...
tree
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commitdiff
2010-05-11
Evan Cheng
Select @llvm.trap to the special B with 1111 condition...
tree
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commitdiff
2010-05-11
Evan Cheng
Model some vst3 and vst4 with reg_sequence.
tree
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commitdiff
2010-05-10
Evan Cheng
Model some vld3 instructions with REG_SEQUENCE.
tree
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commitdiff
2010-05-10
Evan Cheng
Model vld2 / vst2 with reg_sequence.
tree
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commitdiff
2010-05-07
Jim Grosbach
Clean up the conditional for handling of sign_extend_in...
tree
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commitdiff
2010-05-07
Evan Cheng
Use VLD2q32 / VST2q32 to reload / spill QQ (pair of...
tree
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commitdiff
2010-05-07
Evan Cheng
Use VSTMD / VLDMD for spills and reloads of Q registers...
tree
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commitdiff
2010-05-07
Evan Cheng
Remove VLD1q and VST1q for reloading and spilling Q...
tree
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commitdiff
2010-05-06
Dan Gohman
Add a DebugLoc argument to TargetInstrInfo::copyRegToRe...
tree
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commitdiff
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