Mark pattern-less mayLoad / mayStore instructions neverHasSideEffects. These do not...
[oota-llvm.git] / lib / Target / ARM /
2010-05-19 Evan ChengMark pattern-less mayLoad / mayStore instructions never...
2010-05-19 Evan ChengTarget instruction selection should copy memoperands.
2010-05-19 Evan ChengMark a few more pattern-less instructions with neverHas...
2010-05-18 Evan ChengSink dag combine's post index load / store code that...
2010-05-17 Jakob Stoklund OlesenARMBaseRegisterInfo::estimateRSStackSizeLimit() could...
2010-05-17 Evan Chengvmov of immediates are trivially re-materializable.
2010-05-17 Bob WilsonFix a regression in 464.h264 for thumb1 and thumb2...
2010-05-17 Evan ChengTurn on -neon-reg-sequence by default.
2010-05-17 Evan ChengNo reason not to run the NEON domain croassing fix...
2010-05-16 Anton KorobeynikovChris said that the comment char should be escaped...
2010-05-16 Anton KorobeynikovGeneralize the ARM DAG combiner of mul with constants...
2010-05-16 Evan ChengModel vst lane instructions with REG_SEQUENCE.
2010-05-15 Anton KorobeynikovSome cheap DAG combine goodness for multiplication...
2010-05-15 Anton Korobeynikov"trap" pseudo-op turned out to be apple-local.
2010-05-15 Evan ChengModel 128-bit vld lane with REG_SEQUENCE.
2010-05-15 Evan Chengv4i64 and v8i64 are only synthesizable when NEON is...
2010-05-15 Evan ChengAllow TargetLowering::getRegClassFor() to be called...
2010-05-15 Evan ChengModel 64-bit lane vld with REG_SEQUENCE.
2010-05-14 Evan ChengTeach two-address pass to do some coalescing while...
2010-05-14 Evan ChengModel VST*_UPD and VST*oddUPD pair with REG_SEQUENCE.
2010-05-14 Bill WendlingRename "HasCalls" in MachineFrameInfo to "AdjustsStack...
2010-05-14 Evan ChengModel VLD*_UPD and VLD*odd_UPD pair with REG_SEQUENCE.
2010-05-14 Evan ChengAdded a QQQQ register file to model 4-consecutive Q...
2010-05-14 Evan ChengFix comments.
2010-05-13 Evan ChengAdd comment about the pseudo registers QQ, each of...
2010-05-13 Bob WilsonFix pr7110: For non-Darwin targets UnspilledCS1GPRs...
2010-05-13 Daniel DunbarFix -Asserts warning.
2010-05-13 Evan ChengBring back VLD1q and VST1q and use them for reloading...
2010-05-13 Evan ChengExpand VMOVQQ into a pair of VMOVQ.
2010-05-13 Evan ChengMark some pattern-less instructions as neverHasSideEffects.
2010-05-12 Evan ChengFix some potential issues in the pseudo instruction...
2010-05-12 Evan ChengRemove a dead fixme.
2010-05-12 Rafael EspindolaAdd support for movi32 of global values to the new...
2010-05-12 Evan Chengvst instructions are modeled as this:
2010-05-11 Evan ChengAvoid breaking vstd when reg_sequence is not used.
2010-05-11 Duncan SandsI got tired of VISIBILITY_HIDDEN colliding with the...
2010-05-11 Dan GohmanImplement a bunch more TargetSelectionDAGInfo infrastru...
2010-05-11 Dan GohmanRemove the TargetLowering::getSubtarget() virtual funct...
2010-05-11 Evan ChengSelect @llvm.trap to the special B with 1111 condition...
2010-05-11 Evan ChengModel some vst3 and vst4 with reg_sequence.
2010-05-10 Evan ChengModel some vld3 instructions with REG_SEQUENCE.
2010-05-10 Evan ChengModel vld2 / vst2 with reg_sequence.
2010-05-07 Jim GrosbachClean up the conditional for handling of sign_extend_in...
2010-05-07 Evan ChengUse VLD2q32 / VST2q32 to reload / spill QQ (pair of...
2010-05-07 Evan ChengUse VSTMD / VLDMD for spills and reloads of Q registers...
2010-05-07 Evan ChengRemove VLD1q and VST1q for reloading and spilling Q...
2010-05-06 Dan GohmanAdd a DebugLoc argument to TargetInstrInfo::copyRegToRe...
2010-05-06 Evan ChengAdd argument TargetRegisterInfo to loadRegFromStackSlot...
2010-05-06 Bob WilsonAdd a missing break statement to fix unintentional...
2010-05-06 Jim GrosbachFix unintentional fallthrough. Patch by Edmund Grimley...
2010-05-06 Shantonu SenFix "warning: extra ';' inside a struct or union" when...
2010-05-06 Evan ChengRe-apply 103156 and 103157. 103156 didn't break anythin...
2010-05-06 Dan GohmanRevert r103157, which broke test/CodeGen/ARM/2009-11...
2010-05-06 Eric ChristopherRevert r103156 since it was breaking the build bots.
2010-05-06 Evan ChengFix an obvious bug in isMoveInstr. It needs to return...
2010-05-06 Evan ChengAdding pseudo 256-bit registers QQ0 . . . QQ7 to repres...
2010-05-06 Evan ChengCosmetic changes.
2010-05-06 Evan ChengstoreRegToStackSlot has forgotten about QPR_8 register...
2010-05-05 Jim GrosbachCleanup of ARMv7M support. Move hardware divide and...
2010-05-05 Evan ChengDo not pre-allocate references of D registers pairs...
2010-05-05 Jim GrosbachAdd initial support for ARMv7M subtarget and cortex...
2010-05-05 Evan ChengModel CONCAT_VECTORS of two 64-bit values as a REG_SEQU...
2010-05-04 Evan ChengWith -neon-reg-sequence, models forming a Q register...
2010-05-04 Evan ChengDo not pre-allocate for registers which form a REG_SEQU...
2010-05-04 Jim Grosbachrdar://7937137 - dbg values not being handled in thumb1...
2010-05-01 Dan GohmanGet rid of the EdgeMapping map. Instead, just check...
2010-04-29 Evan ChengFrame index can be negative.
2010-04-28 Jim GrosbachAdd sizes non-floating point versions for the eh sjlj...
2010-04-26 Bob WilsonHandle register-to-register copies within the tGPR...
2010-04-26 Dale JohannesenHandle target-specific form of DBG_VALUE in AsmPrinter.
2010-04-26 Evan ChengAdd ARM specific emitFrameIndexDebugValue.
2010-04-22 Jim GrosbachUpdate ARM DAGtoDAG for matching UBFX instruction for...
2010-04-21 Johnny ChenModified some assert() msg strings; no other functional...
2010-04-21 Evan ChengImplement -disable-non-leaf-fp-elim which disable frame...
2010-04-21 Johnny ChenThumb instructions which have reglist operands at the...
2010-04-20 Johnny ChenBetter error-handling of getBitFieldInvMask() where...
2010-04-20 Johnny ChenFor t2LDRT, t2LDRBT, t2LDRHT, t2LDRSBT, and t2LDRSHT...
2010-04-20 Johnny ChenBetter error-handling for DisassembleThumb2DPModImm...
2010-04-20 Johnny ChenMore IT instruction error-handling improvements from...
2010-04-19 Johnny ChenBetter error handling of invalid IT mask '0000', instea...
2010-04-19 Johnny ChenAccording to A8.6.16 B (Encoding T3) and A8.3 Condition...
2010-04-19 Johnny ChenBetter error-handling for DisassembleThumb2DPSoReg...
2010-04-19 Johnny ChenARM disassembler did not react to recent changes to...
2010-04-18 Anton KorobeynikovMake processor FUs unique for given itinerary. This...
2010-04-17 Dan GohmanFix -Wcast-qual warnings.
2010-04-17 Dan GohmanAdd const qualifiers to TargetLoweringObjectFile usage.
2010-04-17 Dan GohmanUse const qualifiers with TargetLowering. This eliminat...
2010-04-17 Dan GohmanMove per-function state out of TargetLowering subclasse...
2010-04-17 Bob WilsonRevise my previous change to ExpandBIT_CONVERT. I...
2010-04-16 Johnny ChenCast to (uint64_t) instead of relying on the "ul" suffix.
2010-04-16 Dan GohmanAdd skeleton target-specific SelectionDAGInfo files.
2010-04-16 Johnny ChenFixed logic error. Should check Builder for validity...
2010-04-16 Johnny ChenFixed a bug in DisassembleN1RegModImmFrm() where a...
2010-04-16 Johnny ChenIn the same spirit of r101524, which removed the assert...
2010-04-16 Johnny ChenMulticlass LdStCop was using pre-UAL syntax LDC<c>L...
2010-04-16 Johnny ChenRemove the assert() from printAddrMode2OffsetOperand...
2010-04-16 Evan ChengUse getAL() rather than a major constant.
2010-04-15 Johnny ChenFixed a bug in ARM disassembly where LDRSBT should...
2010-04-15 Evan ChengUse default lowering of DYNAMIC_STACKALLOC. As far...
2010-04-15 Evan ChengARM SelectDYN_ALLOC should emit a copy from SP rather...
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