ARM assembly parsing for ASR(immediate).
[oota-llvm.git] / lib / Target / ARM /
2011-11-10 Jim GrosbachARM assembly parsing for ASR(immediate).
2011-11-10 Chad RosierFor immediate encodings of icmp, zero or sign extend...
2011-11-10 Daniel Dunbarllvm-build: Add --native-target and --enable-targets...
2011-11-10 Daniel Dunbarllvm-build: Add an explicit component type to represent...
2011-11-10 Jim GrosbachTidy up.
2011-11-09 Jim GrosbachThumb2 assembly parsing STMDB w/ optional .w suffix.
2011-11-09 Eli FriedmanMake sure we correctly unroll conversions between v2f64...
2011-11-09 Chad RosierThe ARM LDRH/STRH instructions use a +/-imm8 encoding...
2011-11-09 Chad RosierAdd support for encoding immediates in icmp and fcmp...
2011-11-09 Evan ChengHide cpu name checking in ARMSubtarget.
2011-11-08 Evan ChengAdd workaround for Cortex-M3 errata 602117 by replacing...
2011-11-08 Chad RosierARMFastISel doesn't support thumb1. Rename isThumb...
2011-11-08 Lang HamesLower mem-ops to unaligned i32/i16 load/stores on ARM...
2011-11-08 Pete CooperAdded invariant field to the DAG.getLoad method and...
2011-11-08 Eli FriedmanMake sure to mark vector extload's as expand on ARM...
2011-11-08 Chad RosierEnable support for returning i1, i8, and i16. Nothing...
2011-11-07 Chad RosierAllow i1 to be promoted to i32 for ARM AAPCS and AAPCS...
2011-11-07 Benjamin KramerSimplify some uses of utohexstr.
2011-11-06 Benjamin KramerReplace (Lower|Upper)caseString in favor of StringRef...
2011-11-05 Chad RosierAdd support for passing i1, i8, and i16 call parameters...
2011-11-05 Chad RosierAllow i1 to be promoted to i32 for ARM APCS calling...
2011-11-04 Chad RosierCannot create a result register for non-legal types.
2011-11-04 Chad RosierWhen materializing an i32, SExt vs ZExt doesn't matter...
2011-11-04 Chad RosierEnable support for materializing i1, i8, and i16 intege...
2011-11-04 Daniel Dunbarbuild/cmake: Use tblgen macro directly instead of llvm_...
2011-11-04 Evan ChengFix some minor scheduling itinerary bug. It's not expec...
2011-11-04 Chad RosierIndentation.
2011-11-04 Chad RosierAdd fast-isel support for returning i1, i8, and i16.
2011-11-03 Dan GohmanReapply r143206, with fixes. Disallow physical register...
2011-11-03 Daniel Dunbarbuild: Add initial cut at LLVMBuild.txt files.
2011-11-03 Chad RosierAdd support for sign-extending non-legal types in Selec...
2011-11-02 Lang HamesFixed parameter name.
2011-11-02 Lang HamesTry to lower memset/memcpy/memmove to vector instructio...
2011-11-02 Chad RosierAdd support for comparing integer non-legal types.
2011-11-02 Owen AndersonFix the issue that r143552 was trying to address the...
2011-11-02 Owen AndersonThe rules disallowing single-register reglist operands...
2011-11-02 Owen AndersonRegister list operands are not allowed to contain only...
2011-11-02 Chad RosierFactor out an EmitIntExt function. No functionality...
2011-11-02 Chad RosierFactor out a SelectTrunc function. No functionality...
2011-11-01 Jim GrosbachARM label operands can be quoted.
2011-11-01 Jim GrosbachARM label operands can have an optional '#' before...
2011-11-01 Owen AndersonFix disassembly of some VST1 instructions.
2011-11-01 Jim GrosbachARM VLD/VST assembly parsing for symbolic address operands.
2011-10-31 Jim GrosbachARM VST1 w/ writeback assembly parsing and encoding.
2011-10-31 Jim GrosbachARM writeback vs. stride operands for VST/VLD.
2011-10-31 Owen AndersonMore not-crashing NEON disassembly updates for the...
2011-10-29 Dan GohmanRevert r143206, as there are still some failing tests.
2011-10-28 Jim GrosbachARM mode 'mov' to 'mvn' assembler alias.
2011-10-28 Jim GrosbachAdd Thumb2 alias for "mov Rd, #imm" to "mvn Rd, #~imm".
2011-10-28 Owen AndersonSpecify that the high bit of the alignment field is...
2011-10-28 Owen AndersonReapply r143202, with a manual decoding hook for SWP...
2011-10-28 Dan GohmanReapply r143177 and r143179 (reverting r143188), with...
2011-10-28 Owen AndersonRevert r143202.
2011-10-28 Owen AndersonSpecify fixed bits on CPS instructions to enable roundt...
2011-10-28 Jim GrosbachThumb2 ADD/SUB instructions encoding selection outside...
2011-10-28 Duncan SandsSpeculatively disable Dan's commits 143177 and 143179...
2011-10-28 Dan GohmanEliminate LegalizeOps' LegalizedNodes map and have...
2011-10-28 Jim GrosbachARM Allow 'q' registers in VLD/VST vector lists.
2011-10-27 Owen AndersonAdd some NEON stores to the VLD decoding hook that...
2011-10-27 Jakob Stoklund OlesenAlso set addrmode6 alignment when align==size.
2011-10-27 Jim GrosbachARM isel for vld1, opcode selection for register stride...
2011-10-27 Evan ChengAvoid partial CPSR dependency from loop backedges....
2011-10-27 Jim GrosbachThumb2 t2LDMDB[_UPD] assembly parsing to recognize...
2011-10-27 Jim GrosbachThumb2 t2MVNi assembly parsing to recognize ".w" suffix.
2011-10-27 Chad RosierA branch predicated on a constant can just FastEmit...
2011-10-26 Chad RosierAdd a TODO comment. FastISel works by parsing each...
2011-10-26 Chad RosierFactor a little more code into EmitCmp, which should...
2011-10-26 Chad RosierUse EmitCmp in SelectBranch. No functional change...
2011-10-26 Chad RosierFactor out an EmitCmp function that can be used by...
2011-10-26 Jim GrosbachThumb2 ldr pc-relative encoding fixes.
2011-10-26 Jim GrosbachARM parse parenthesized expressions for label references.
2011-10-26 Lang HamesMake sure short memsets on ARM lower to stores, even...
2011-10-26 Jim GrosbachThumb2 remove redundant ".w" suffix from t2MVNCCi pattern.
2011-10-26 James MolloyRevert r142530 at least temporarily while a discussion...
2011-10-26 Bill WendlingUse a worklist to prevent the iterator from becoming...
2011-10-26 Evan ChengRevert part of r142530. The patch potentially hurts...
2011-10-25 Jim GrosbachARM assembly parsing and encoding for VLD1 with writeback.
2011-10-24 Jim GrosbachNuke dead code. Nothing generates the VLD1d64QPseudo_UP...
2011-10-24 Jim GrosbachARM assembly parsing and encoding for VLD1 w/ writeback.
2011-10-24 Eli FriedmanDon't crash on variable insertelement on ARM. PR10258.
2011-10-24 Evan ChengARMConstantPoolMBB::print should print BB number.
2011-10-24 Jim GrosbachARM assembly parsing and encoding for VLD1 w/ writeback.
2011-10-24 Jim GrosbachARM refactor am6offset usage for VLD1.
2011-10-24 Owen AndersonFix a NEON disassembly case that was broken in the...
2011-10-24 Dan GohmanChange this overloaded use of Sched::Latency to be...
2011-10-24 Jim GrosbachThumb2 LDM instructions can target PC. Make sure to...
2011-10-22 Benjamin KramerMove various generated tables into read-only memory...
2011-10-22 Bill WendlingThe different flavors of ARM have different valid subse...
2011-10-21 Jim GrosbachAssembly parsing for 4-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 2-register sequential variant...
2011-10-21 Jim GrosbachAssembly parsing for 4-register variant of VLD1.
2011-10-21 Jim GrosbachAssembly parsing for 3-register variant of VLD1.
2011-10-21 Jim GrosbachARM VLD parsing and encoding.
2011-10-21 Owen AndersonDon't automatically set the "fc" bits on MSR instructio...
2011-10-21 Jim GrosbachNuke an #if0 that got accidentally left in.
2011-10-21 Jim Grosbachwhitespace.
2011-10-21 Jim GrosbachRemove some outdated comments.
2011-10-20 Owen AndersonRevert r142618, r142622, and r142624, which were based...
2011-10-20 Owen AndersonSeparate out ARM MSR instructions into M-class versions...
2011-10-20 Bill WendlingAdd missing operand. <rdar://problem/10313323>
next