2011-04-19 |
Bob Wilson | This patch combines several changes from Evan Cheng... |
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2011-04-19 |
Bob Wilson | Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extensio... |
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2011-04-19 |
Bob Wilson | Avoid some 's' 16-bit instruction which partially updat... |
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2011-04-19 |
Bob Wilson | Avoid write-after-write issue hazards for Cortex-A9. |
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2011-04-19 |
Bob Wilson | Some single-precision VFP instructions can execute... |
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2011-04-19 |
Bob Wilson | Improvements for the Cortex-A9 scheduling itineraries. |
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2011-04-19 |
Evan Cheng | Change A9 scheduling itineraries VLD* / VST* entries... |
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2011-04-19 |
Evan Cheng | Do not lose mem_operands while lowering VLD / VST intri... |
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2011-04-18 |
Jim Grosbach | Trim a few unneeded includes. |
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2011-04-18 |
Sean Callanan | Small fix to the ARM AsmParser to ensure that a |
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2011-04-16 |
Stuart Hastings | Correct result when a branch condition is live across... |
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2011-04-15 |
Johnny Chen | Thumb2 BFC was insufficiently encoded. |
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2011-04-15 |
Johnny Chen | A8.6.315 VLD3 (single 3-element structure to all lanes) |
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2011-04-15 |
Cameron Zwarich | Add ORR and EOR to the CMP peephole optimizer. It's... |
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2011-04-15 |
Cameron Zwarich | The AND instruction leaves the V flag unmodified, so... |
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2011-04-15 |
Cameron Zwarich | Add missing register forms of instructions to the ARM... |
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2011-04-15 |
Chris Lattner | Fix a ton of comment typos found by codespell. Patch by |
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2011-04-15 |
Evan Cheng | Fix another fcopysign lowering bug. If src is f64 and... |
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2011-04-15 |
Johnny Chen | For t2BFI, both Inst{26} and Inst{5} "should" be 0. |
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2011-04-15 |
Johnny Chen | The ARM disassembler did not handle the alignment corre... |
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2011-04-14 |
Evan Cheng | Follow up on r127913. Fix Thumb revsh isel. rdar:/... |
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2011-04-14 |
Johnny Chen | Add sanity checkings for Thumb2 Load/Store Register... |
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2011-04-13 |
Johnny Chen | Thumb disassembler did not handle tBRIND (indirect... |
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2011-04-13 |
Johnny Chen | Check for unallocated instruction encodings when disass... |
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2011-04-13 |
Johnny Chen | The LDR*T/STR*T (unpriviledged load/store) operations... |
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2011-04-13 |
Cameron Zwarich | Fix a typo in an ARM-specific DAG combine. This fixes... |
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2011-04-13 |
Johnny Chen | Check the corner cases for t2LDRSHi12 correctly and... |
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2011-04-13 |
Johnny Chen | Fix a bug where for t2MOVCCi disassembly, the TIED_TO... |
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2011-04-13 |
Johnny Chen | Forgot to add this change for llvm.org/viewvc/llvm... |
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2011-04-13 |
Cameron Zwarich | Fix a typo. |
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2011-04-12 |
Johnny Chen | Add sanity check for Ld/St Dual forms of Thumb2 instruc... |
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2011-04-12 |
Jakob Stoklund Olesen | Add @earlyclobber constraints to the writeback register... |
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2011-04-12 |
Johnny Chen | The Thumb2 RFE instructions need to have their second... |
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2011-04-12 |
Johnny Chen | Add bad register checks for Thumb2 Ld/St instructions. |
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2011-04-12 |
Johnny Chen | The Thumb2 Ld, St, and Preload instructions with the... |
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2011-04-12 |
Johnny Chen | Print out a debug message when the reglist fails the... |
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2011-04-12 |
Cameron Zwarich | Split a store of a VMOVDRR into two integer stores... |
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2011-04-12 |
Johnny Chen | A8.6.16 B |
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2011-04-11 |
Johnny Chen | Thumb disassembler was erroneously rejecting "blx sp... |
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2011-04-11 |
Johnny Chen | Fix the bug where the immediate shift amount for Thumb... |
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2011-04-11 |
Owen Anderson | Fix another using-CPSR-twice bug in my ADCS/SBCS cleanu... |
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2011-04-11 |
Johnny Chen | Trivial comment fix. |
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2011-04-11 |
Johnny Chen | Check invalid register encodings for LdFrm/StFrm ARM... |
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2011-04-11 |
Kevin Enderby | Adding support for printing operands symbolically to... |
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2011-04-11 |
Jay Foad | Don't include Operator.h from InstrTypes.h. |
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2011-04-08 |
Matt Beaumont-Gay | Fix an apparent typo that made GCC complain |
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2011-04-08 |
Evan Cheng | Change -arm-trap-func= into a non-arm specific option... |
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2011-04-08 |
Johnny Chen | Check opcoe (dmb, dsb) instead of bitfields matching. |
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2011-04-08 |
Johnny Chen | Hanlde the checking of bad regs for SMMLAR properly... |
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2011-04-08 |
Johnny Chen | Sanity check the option operand for DMB/DSB. |
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2011-04-08 |
Jim Grosbach | Mark hasExtraDefRegAllocReq=1 on LDRD. |
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2011-04-08 |
Johnny Chen | Add sanity checking for bad register specifier(s) for... |
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2011-04-07 |
Evan Cheng | Add option to emit @llvm.trap as a function call instea... |
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2011-04-07 |
Mon P Wang | Fixed encoding for VEXTqf |
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2011-04-07 |
Johnny Chen | Add sanity checking for invalid register encodings... |
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2011-04-07 |
Johnny Chen | Add sanity checking for invalid register encodings... |
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2011-04-07 |
Johnny Chen | Add some more comments about checkings of invalid regis... |
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2011-04-07 |
Tanya Lattner | Prevent ARM DAG Combiner from doing an AND or OR combin... |
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2011-04-07 |
Johnny Chen | Sanity check MSRi for invalid mask values and reject... |
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2011-04-07 |
Johnny Chen | The ARM disassembler was not recognizing USADA8 instruc... |
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2011-04-07 |
Evan Cheng | Change -arm-divmod-libcall to a target neutral option. |
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2011-04-07 |
Johnny Chen | Should also check SMLAD for invalid register values. |
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2011-04-06 |
Owen Anderson | Teach the ARM peephole optimizer that RSB, RSC, ADC... |
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2011-04-06 |
Owen Anderson | Cleanups from Jim: remove redundant constraints and... |
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2011-04-06 |
Jim Grosbach | Tidy up. |
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2011-04-06 |
Johnny Chen | A8.6.393 |
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2011-04-06 |
Johnny Chen | A8.6.92 MCR (Encoding A1): if coproc == '101x' then... |
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2011-04-06 |
Johnny Chen | Fix a bug in the disassembly of VGETLNs8 where the... |
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2011-04-06 |
Johnny Chen | Add a missing opcode (SMLSLDX) to BadRegsMulFrm() function. |
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2011-04-05 |
Owen Anderson | Reapply r128946 (pseudoization of various instructions... |
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2011-04-05 |
Johnny Chen | Fix a typo in the handling of PKHTB opcode, plus add... |
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2011-04-05 |
Bob Wilson | Clean up some code for clarity. |
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2011-04-05 |
Owen Anderson | Revert r128946 while I figure out why it broke the... |
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2011-04-05 |
Johnny Chen | A7.3 register encoding |
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2011-04-05 |
Owen Anderson | Give RSBS and RSCS the pseudo treatment. |
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2011-04-05 |
Johnny Chen | ARM disassembler was erroneously accepting an invalid... |
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2011-04-05 |
Johnny Chen | ARM disassembler was erroneously accepting an invalid... |
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2011-04-05 |
Owen Anderson | Fix bugs in the pseuo-ization of ADCS/SBCS pointed... |
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2011-04-05 |
Johnny Chen | The r128085 checkin modified the operand ordering for... |
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2011-04-05 |
Johnny Chen | ARM disassembler should flag (rGPRRegClassID, r13|r15... |
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2011-04-05 |
Jim Grosbach | Make second source operand of LDRD pre/post explicit. |
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2011-04-05 |
Johnny Chen | Constants with multiple encodings (ARM): |
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2011-04-05 |
Johnny Chen | Check for invalid register encodings for UMAAL and... |
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2011-04-05 |
Owen Anderson | Convert ADCS and SBCS instructions into pseudos that... |
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2011-04-05 |
Bill Wendling | Revamp the SjLj "dispatch setup" intrinsic. |
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2011-04-05 |
Eric Christopher | Just use BL all the time. It's safer that way. |
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2011-04-05 |
Johnny Chen | Fix SRS/SRSW encoding bits. |
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2011-04-04 |
Johnny Chen | A8.6.105 MUL |
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2011-04-04 |
Johnny Chen | RFE encoding should also specify the "should be" encodi... |
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2011-04-04 |
Johnny Chen | Fix incorrect alignment for NEON VST2b32_UPD. |
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2011-04-04 |
Bruno Cardoso Lopes | - Implement asm parsing support for LDRSBT, LDRHT,... |
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2011-04-02 |
Cameron Zwarich | Do some peephole optimizations to remove pointless... |
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2011-04-02 |
Johnny Chen | Fixed a bug in disassembly of STR_POST, where the immed... |
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2011-04-01 |
Johnny Chen | Fixed MOVr for "should be" encoding bits for Inst{19... |
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2011-04-01 |
Johnny Chen | MOVs should have Inst{19-16} as 0b0000, otherwise,... |
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2011-04-01 |
Johnny Chen | Fix the instruction table entries for AI1_adde_sube_s_i... |
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2011-04-01 |
Evan Cheng | Avoid de-referencing pass beginning of a basic block... |
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2011-04-01 |
Owen Anderson | When the architecture is explicitly armv6 or thumbv6... |
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2011-04-01 |
Jim Grosbach | LDRD/STRD instructions should print both Rt and Rt2... |
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2011-04-01 |
Johnny Chen | Fix a LDRT/LDRBT decoding bug where for Encoding A2... |
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