Factor ARM triple parsing out of ARMSubtarget. Another step towards making ARM subtar...
[oota-llvm.git] / lib / Target / ARM /
2011-07-07 Evan ChengFactor ARM triple parsing out of ARMSubtarget. Another...
2011-07-06 Evan ChengAdd ARM MC registry routines.
2011-07-06 Jim GrosbachMark ARM pseudo-instructions as isPseudo.
2011-07-06 Jim GrosbachRemove un-used encoding info from Pseudo MLAv5.
2011-07-06 Evan ChengcreateMCInstPrinter doesn't need TargetMachine anymore.
2011-07-05 Jim GrosbachARM estimateStackSize() needs to account for simplified...
2011-07-01 Evan ChengRename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc...
2011-07-01 Jim GrosbachARMv7M vs. ARMv7E-M support.
2011-07-01 Evan ChengRename TargetSubtarget to TargetSubtargetInfo for consi...
2011-07-01 Evan Cheng- Added MCSubtargetInfo to capture subtarget features...
2011-07-01 Jim GrosbachFix off-by-one error.
2011-07-01 Evan ChengHide the call to InitMCInstrInfo into tblgen generated...
2011-07-01 Jim GrosbachPseudo-ize t2MOVCC[ri].
2011-07-01 Eric ChristopherAdd support for the 'j' immediate constraint. This...
2011-07-01 Eric ChristopherAdd support for the ARM 't' register constraint. And...
2011-07-01 Eric ChristopherWe'll return a null RC by default if we can't match.
2011-07-01 Eric ChristopherAdd support for the 'x' constraint.
2011-06-30 Eric ChristopherCapitalize the unsigned part of the initializer.
2011-06-30 Eric ChristopherRename Pair to RCPair lacking any better naming ideas.
2011-06-30 Jim GrosbachRefact ARM Thumb1 tMOVr instruction family.
2011-06-30 Eric ChristopherAdd support for the 'h' constraint.
2011-06-30 Eric ChristopherAdd a convenience typedef for std::pair<unsigned, const...
2011-06-30 Jim GrosbachThumb1 register to register MOV instruction is predicable.
2011-06-30 Jim GrosbachPseudo-ize the Thumb tTPsoft instruction.
2011-06-30 Jim GrosbachPseudo-ize the t2LDMIA_RET instruction.
2011-06-30 Jim GrosbachPseudo-ize the Thumb tPOP_RET instruction.
2011-06-30 Jim GrosbachKill dead code.
2011-06-30 Jim GrosbachSize reducing SP adjusting t2ADDri needs to check predi...
2011-06-30 Evan ChengFix ARMSubtarget feature parsing.
2011-06-30 Evan ChengFix the ridiculous SubtargetFeatures API where it impli...
2011-06-29 Jim GrosbachRemove redundant Thumb2 ADD/SUB SP instruction definitions.
2011-06-29 Cameron ZwarichIn the ARM global merging pass, allow extraneous alignm...
2011-06-29 Eric ChristopherRemove getRegClassForInlineAsmConstraint from the ARM...
2011-06-29 Jim GrosbachRefactor away tSpill and tRestore pseudos in ARM backend.
2011-06-29 Evan ChengSink SubtargetFeature and TargetInstrItineraries (renam...
2011-06-28 Evan ChengMove CallFrameSetupOpcode and CallFrameDestroyOpcode...
2011-06-28 Evan ChengHide more details in tablegen generated MCRegisterInfo...
2011-06-28 Evan ChengMerge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
2011-06-28 Evan Cheng- Rename TargetInstrDesc, TargetOperandInfo to MCInstrD...
2011-06-28 Chad RosierRemove warning: 'c0' may be used uninitialized in this...
2011-06-28 Jim GrosbachARM Thumb2 asm syntax optional destination operand...
2011-06-27 Jim GrosbachARM Assembly support for Thumb mov-immediate.
2011-06-27 Jim GrosbachARM Asm parsing of Thumb2 move immediate.
2011-06-27 Evan ChengMore refactoring. Move getRegClass from TargetOperandIn...
2011-06-27 Jim GrosbachAdd exception necessitated by 133938.
2011-06-27 Jim GrosbachARM assembly carry set/clear condition code aliases...
2011-06-27 Jim GrosbachARM assembler support for ldmfd/stmfd mnemonics.
2011-06-27 Jim GrosbachARM assembler support for vpush/vpop.
2011-06-27 Jim GrosbachARM Assembly syntax support for arithmetic implied...
2011-06-27 Evan ChengMerge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc...
2011-06-24 Jim GrosbachRefactor MachO relocation generaration into the Target...
2011-06-24 Jim GrosbachARM movw/movt fixups need to mask the high bits.
2011-06-24 Chad RosierThe Neon VCVT (between floating-point and fixed-point...
2011-06-24 Evan ChengStarting to refactor Target to separate out code that...
2011-06-23 Evan ChengRemove TargetOptions.h dependency from ARMSubtarget.
2011-06-22 Jim GrosbachAdd missing header.
2011-06-22 Jim GrosbachMove ARMMachObjectWriter to its own file.
2011-06-21 Eric ChristopherHandle the memory-ness of all U+ ARM constraints.
2011-06-21 Evan ChengReorg. No functionality change.
2011-06-21 Evan ChengTeach dag combine to match halfword byteswap patterns.
2011-06-18 Benjamin KramerRemove unused but set variables.
2011-06-18 Jakob Stoklund OlesenSwitch ARM to using AltOrders instead of MethodBodies.
2011-06-18 Jakob Stoklund OlesenReserve D16-D13 on subtargets that don't support them.
2011-06-17 Evan ChengAdd an alternative rev16 pattern. We should figure...
2011-06-17 Cameron ZwarichUpdate an insertion point iterator after replacing...
2011-06-17 Jakob Stoklund OlesenExplicitly invoke ArrayRef constructor to keep gcc...
2011-06-16 Jakob Stoklund OlesenRename TRI::getAllocationOrder() to getRawAllocationOrd...
2011-06-16 Owen AndersonChange the REG_SEQUENCE SDNode to take an explict regis...
2011-06-16 Bruno Cardoso LopesMark ldrexd/strexd w/ volatile memory by default
2011-06-16 Chad RosierRevision r128665 added an optimization to make use...
2011-06-15 Jakob Stoklund OlesenUse set operations instead of plain lists to enumerate...
2011-06-15 Evan ChengAnother revsh pattern. rdar://9609059
2011-06-15 Bob WilsonA minor simplification: no functional change.
2011-06-15 Evan ChengPerformBFICombine - (bfi A, (and B, Mask1), Mask2)...
2011-06-14 Tanya LattnerAdd an optimization that looks for a specific pair...
2011-06-14 Evan ChengAlso recognize ARM v4t and v5e variants.
2011-06-14 Bruno Cardoso LopesAdd one more argument to the prefetch intrinsic to...
2011-06-13 Jim GrosbachClean up a few 80 column violations.
2011-06-13 Jim GrosbachFix coordination for using R4 in Thumb1 as a scratch...
2011-06-10 Cameron ZwarichProvide an ARMCCState subclass of CCState so that ARM...
2011-06-09 Cameron ZwarichA CCState was being created without setting whether...
2011-06-08 Eric ChristopherAdd a parameter to CCState so that it can access the...
2011-06-07 Andrew TrickFix for setjmp/longjmp exception handling on ARM. setjm...
2011-06-03 Eric ChristopherMake the Uv constraint a memory operand. This doesn...
2011-06-03 Eli FriedmanAdd ARM fast-isel support for materializing the address...
2011-06-02 Eric ChristopherHave LowerOperandForConstraint handle multiple characte...
2011-06-02 Jakob Stoklund OlesenFlag unallocatable register classes instead of giving...
2011-06-02 Tanya LattnerFix encoding for VEXTdf.
2011-06-02 Jakob Stoklund OlesenUse TRI::has{Sub,Super}ClassEq() where possible.
2011-06-02 Rafael EspindolaDon't hardcode the %reg format in the streamer.
2011-05-31 Bruno Cardoso LopesFix ssat and ssat16 encodings for ARM and Thumb. The...
2011-05-30 Rafael EspindolaUse the dwarf->llvm mapping to print register names...
2011-05-29 John McCallOn Darwin ARM, set the UNWIND_RESUME libcall to _Unwind...
2011-05-29 John McCallI didn't mean to commit these residues of a personal...
2011-05-29 John McCallOn Darwin ARM, set the UNWIND_RESUME libcall to _Unwind...
2011-05-28 Cameron ZwarichFix ARM fast isel to correctly flag memory operands...
2011-05-28 Bruno Cardoso LopesAdd support for ARM ldrexd/strexd intrinsics. They...
2011-05-28 Eric ChristopherThis actually starts at offset 0, not 1.
2011-05-28 Eric ChristopherImplement the 'M' output modifier for arm inline asm...
2011-05-27 Cameron ZwarichFix the remaining atomic intrinsics to use the right...
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