Fix a problem with blocks that need to be split twice.
[oota-llvm.git] / lib / Target / ARM /
2012-04-28 Jakob Stoklund OlesenFix a problem with blocks that need to be split twice.
2012-04-27 Jim GrosbachARM: Thumb add(sp plus register) asm constraints.
2012-04-27 Jim GrosbachARM: Tweak tADDrSP definition for consistent operand...
2012-04-27 Jakob Stoklund OlesenTrack worst case alignment padding more accurately.
2012-04-27 Lang HamesFix the order of the operands in the llvm.fma intrinsic...
2012-04-27 Richard BartonFix ARM assembly parsing for upper case condition codes...
2012-04-27 Richard BartonRefactor IT handling not to store the bottom bit of...
2012-04-27 Evan ChengImplement a bastardized ABI.
2012-04-27 Evan Cheng- thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn...
2012-04-26 Jim GrosbachARM: Thumb ldr(literal) base address alignment is 32...
2012-04-26 Tim NorthoverUse VLD1 in NEON extenting-load patterns instead of...
2012-04-26 Tim NorthoverTest commit.
2012-04-26 Evan ChengIf triple is armv7 / thumbv7 and a CPU is specified...
2012-04-25 Richard BartonUnify internal representation of ARM instructions with...
2012-04-25 Craig TopperAdd ifdef around getSubtargetFeatureName in tablegen...
2012-04-24 Jim GrosbachARM: improved assembler diagnostics for missing CPU...
2012-04-24 Jim GrosbachARM: Nuke remnant bogus code.
2012-04-24 Richard BartonRefactor Thumb ITState handling in ARM Disassembler...
2012-04-23 Jim GrosbachTidy up. 80 columns, whitespace, et. al.
2012-04-23 Preston GurdThis patch fixes a problem which arose when using the...
2012-04-23 Jim GrosbachARM: VSLI two-operand assmebly aliases are tblgen'erated.
2012-04-23 Jim GrosbachARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand...
2012-04-23 Jim GrosbachARM: vqdmulh two-operand aliases are tblgen'erated...
2012-04-22 Benjamin KramerARM: Initialize the HasRAS bit.
2012-04-20 Jim GrosbachARM: tblgen'erate more NEON two-operand aliases.
2012-04-20 Jim GrosbachARM: tblgen'erate more NEON two-operand aliases.
2012-04-20 Jim GrosbachARM: Update NEON assembly two-operand aliases.
2012-04-20 Craig TopperConvert more uses of XXXRegisterClass to &XXXRegClass...
2012-04-20 Jim GrosbachARM some VFP tblgen'erated two-operand aliases.
2012-04-19 Jim GrosbachARM let TableGen handle a few two-operand aliases.
2012-04-18 Silviu BarangaAdded support for disassembling unpredictable swp/swpb...
2012-04-18 Silviu BarangaFix the bahavior of the disassembler when decoding...
2012-04-18 Silviu BarangaAdded support for unpredictable mcrr/mcrr2/mrrc/mrrc2...
2012-04-18 Silviu BarangaFixed decoding for the ARM cdp2 instruction. The restri...
2012-04-18 Silviu BarangaAdd suport for unpredicatble cases of the cmp, tst...
2012-04-17 Chad RosierTypo.
2012-04-17 Jay FoadRemove unused CCIfSubtarget.
2012-04-17 James MolloyFix bad EXTRACT_SUBREG in instruction selection for...
2012-04-17 Kevin EnderbyFix ARM disassembly of VLD2 (single 2-element structure...
2012-04-16 Jim GrosbachARM two-operand forms for vhadd and vhsub instructions.
2012-04-16 Jim GrosbachARM handle :lower16: and :upper16: after a '#' prefix.
2012-04-16 Jim GrosbachARM assembly two-operand forms for VRSHL.
2012-04-16 Jim GrosbachARM two-operand aliases for VRHADD instructions.
2012-04-15 Benjamin KramerWire up support for diagnostic ranges in the ARMAsmParser.
2012-04-13 Evan ChengOn Darwin targets, only use vfma etc. if the source...
2012-04-13 Kevin EnderbyFor ARM disassembly only print 32 unsigned bits for...
2012-04-12 Kevin EnderbyFix a few more places in the ARM disassembler so that...
2012-04-12 Jim GrosbachARM 'adr' fixups don't need the interworking addend...
2012-04-11 Kevin EnderbyFixed a case of ARM disassembly getting an assert on...
2012-04-11 Jim GrosbachARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
2012-04-11 Jim GrosbachARM 'vzip.32 Dd, Dm' is a pseudo-instruction.
2012-04-11 Evan ChengAdd more fused mul+add/sub patterns. rdar://10139676
2012-04-11 Evan ChengClean up ARM fused multiply + add/sub support some...
2012-04-11 Evan ChengMatch (fneg (fma) to vfnma. rdar://10139676
2012-04-11 Kevin EnderbyFix ARM disassembly of VLD instructions with writebacks...
2012-04-11 Jim GrosbachARM add missing Thumb1 two-operand aliases for shift...
2012-04-11 Evan ChengFix a number of problems with ARM fused multiply add...
2012-04-10 Evan ChengHandle llvm.fma.* intrinsics. rdar://10914096
2012-04-10 Jim GrosbachARM fix cc_out operand handling for t2SUBrr instructions.
2012-04-10 Evan ChengFix a long standing tail call optimization bug. When...
2012-04-10 Jim GrosbachARM LDR/LDRT has the same encoding collision as STR...
2012-04-09 Chad RosierWhen performing a truncating store, it's possible to...
2012-04-09 Chad RosierUpdate comments and remove unnecessary isVolatile(...
2012-04-07 Bob WilsonFix Thumb __builtin_longjmp with integrated assembler...
2012-04-06 Jim GrosbachTidy up. 80 columns.
2012-04-06 Jakob Stoklund OlesenARMPat is equivalent to Requires<[IsARM]>.
2012-04-06 Jakob Stoklund OlesenEliminate iOS-specific tail call instructions.
2012-04-06 Chandler CarruthThere is no portable std::abs overload for int64_t...
2012-04-06 Jakob Stoklund OlesenAllow negative immediates in ARM and Thumb2 compares.
2012-04-06 Jakob Stoklund OlesenDeduplicate ARM call-related instructions.
2012-04-05 Jim GrosbachARM: Don't form a t2LDRi8 or t2STRi8 with an offset...
2012-04-05 Jim GrosbachARM assembly aliases for add negative immediates using...
2012-04-05 Silviu BarangaAdded support for unpredictable ADC/SBC instructions...
2012-04-05 Silviu BarangaAdded support for handling unpredictable arithmetic...
2012-04-05 Jim GrosbachARM assembly aliases for two-operand V[R]SHR instructions.
2012-04-05 Jim GrosbachARM assembly parsing for 'msr' plain 'cpsr' operand.
2012-04-04 Jakob Stoklund OlesenImplement ARMBaseInstrInfo::commuteInstruction() for...
2012-04-04 Rafael EspindolaAlways compute all the bits in ComputeMaskedBits.
2012-04-03 Dylan NoblesmithARMDisassembler: drop bogus dependency on ARMCodeGen
2012-04-02 Benjamin KramerMove getOpcodeName from the various target InstPrinters...
2012-04-02 Craig TopperRemove getInstructionName from MCInstPrinter implementa...
2012-04-02 Craig TopperMake MCInstrInfo available to the MCInstPrinter. This...
2012-03-31 Jakob Stoklund OlesenAdd a 2 byte safety margin in offset computations.
2012-03-31 Jakob Stoklund OlesenAdd more debugging output to ARMConstantIslandPass.
2012-03-30 Jim GrosbachARM fix encoding fixup resolution for ldrd and friends.
2012-03-30 Jim GrosbachARM assembler should prefer non-aliases encoding of...
2012-03-30 Jim GrosbachARM encoding for VSWP got the second operand incorrect.
2012-03-30 Jim GrosbachARM can only use narrow encoding for low regs.
2012-03-30 Jim GrosbachARM integrated assembler should encoding choice for...
2012-03-30 Jim GrosbachARM assembly parsing needs to be paranoid about negativ...
2012-03-30 James MolloyEnsure conditional BL instructions for ARM are given...
2012-03-30 Evan ChengARM target should allow codegenprep to duplicate ret...
2012-03-29 Jakob Stoklund OlesenInvalidate liveness in ARMConstantIslandPass.
2012-03-29 Jakob Stoklund OlesenPrefer even-odd D-register pairs.
2012-03-29 Lang HamesTry using vmov.i32 to materialize FP32 constants that...
2012-03-29 Jim GrosbachARM assembly 'cmp lr, #0' should not encode using ...
2012-03-29 Jakob Stoklund OlesenHandle register copies for the new ARM register classes.
2012-03-28 Jakob Stoklund OlesenDon't kill the base register when expanding strd.
2012-03-28 Jakob Stoklund OlesenPreserve implicit defs in ARMLoadStoreOptimizer.
2012-03-28 Jakob Stoklund OlesenSpill DPair registers, not just QPR.
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