Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extension. rdar://8648637.
[oota-llvm.git] / lib / Target / ARM /
2011-04-19 Bob WilsonAdd -mcpu=cortex-a9-mp. It's cortex-a9 with MP extensio...
2011-04-19 Bob WilsonAvoid some 's' 16-bit instruction which partially updat...
2011-04-19 Bob WilsonAvoid write-after-write issue hazards for Cortex-A9.
2011-04-19 Bob WilsonSome single-precision VFP instructions can execute...
2011-04-19 Bob WilsonImprovements for the Cortex-A9 scheduling itineraries.
2011-04-19 Evan ChengChange A9 scheduling itineraries VLD* / VST* entries...
2011-04-19 Evan ChengDo not lose mem_operands while lowering VLD / VST intri...
2011-04-18 Jim GrosbachTrim a few unneeded includes.
2011-04-18 Sean CallananSmall fix to the ARM AsmParser to ensure that a
2011-04-16 Stuart HastingsCorrect result when a branch condition is live across...
2011-04-15 Johnny ChenThumb2 BFC was insufficiently encoded.
2011-04-15 Johnny ChenA8.6.315 VLD3 (single 3-element structure to all lanes)
2011-04-15 Cameron ZwarichAdd ORR and EOR to the CMP peephole optimizer. It's...
2011-04-15 Cameron ZwarichThe AND instruction leaves the V flag unmodified, so...
2011-04-15 Cameron ZwarichAdd missing register forms of instructions to the ARM...
2011-04-15 Chris LattnerFix a ton of comment typos found by codespell. Patch by
2011-04-15 Evan ChengFix another fcopysign lowering bug. If src is f64 and...
2011-04-15 Johnny ChenFor t2BFI, both Inst{26} and Inst{5} "should" be 0.
2011-04-15 Johnny ChenThe ARM disassembler did not handle the alignment corre...
2011-04-14 Evan ChengFollow up on r127913. Fix Thumb revsh isel. rdar:/...
2011-04-14 Johnny ChenAdd sanity checkings for Thumb2 Load/Store Register...
2011-04-13 Johnny ChenThumb disassembler did not handle tBRIND (indirect...
2011-04-13 Johnny ChenCheck for unallocated instruction encodings when disass...
2011-04-13 Johnny ChenThe LDR*T/STR*T (unpriviledged load/store) operations...
2011-04-13 Cameron ZwarichFix a typo in an ARM-specific DAG combine. This fixes...
2011-04-13 Johnny ChenCheck the corner cases for t2LDRSHi12 correctly and...
2011-04-13 Johnny ChenFix a bug where for t2MOVCCi disassembly, the TIED_TO...
2011-04-13 Johnny ChenForgot to add this change for llvm.org/viewvc/llvm...
2011-04-13 Cameron ZwarichFix a typo.
2011-04-12 Johnny ChenAdd sanity check for Ld/St Dual forms of Thumb2 instruc...
2011-04-12 Jakob Stoklund OlesenAdd @earlyclobber constraints to the writeback register...
2011-04-12 Johnny ChenThe Thumb2 RFE instructions need to have their second...
2011-04-12 Johnny ChenAdd bad register checks for Thumb2 Ld/St instructions.
2011-04-12 Johnny ChenThe Thumb2 Ld, St, and Preload instructions with the...
2011-04-12 Johnny ChenPrint out a debug message when the reglist fails the...
2011-04-12 Cameron ZwarichSplit a store of a VMOVDRR into two integer stores...
2011-04-12 Johnny ChenA8.6.16 B
2011-04-11 Johnny ChenThumb disassembler was erroneously rejecting "blx sp...
2011-04-11 Johnny ChenFix the bug where the immediate shift amount for Thumb...
2011-04-11 Owen AndersonFix another using-CPSR-twice bug in my ADCS/SBCS cleanu...
2011-04-11 Johnny ChenTrivial comment fix.
2011-04-11 Johnny ChenCheck invalid register encodings for LdFrm/StFrm ARM...
2011-04-11 Kevin EnderbyAdding support for printing operands symbolically to...
2011-04-11 Jay FoadDon't include Operator.h from InstrTypes.h.
2011-04-08 Matt Beaumont-GayFix an apparent typo that made GCC complain
2011-04-08 Evan ChengChange -arm-trap-func= into a non-arm specific option...
2011-04-08 Johnny ChenCheck opcoe (dmb, dsb) instead of bitfields matching.
2011-04-08 Johnny ChenHanlde the checking of bad regs for SMMLAR properly...
2011-04-08 Johnny ChenSanity check the option operand for DMB/DSB.
2011-04-08 Jim GrosbachMark hasExtraDefRegAllocReq=1 on LDRD.
2011-04-08 Johnny ChenAdd sanity checking for bad register specifier(s) for...
2011-04-07 Evan ChengAdd option to emit @llvm.trap as a function call instea...
2011-04-07 Mon P WangFixed encoding for VEXTqf
2011-04-07 Johnny ChenAdd sanity checking for invalid register encodings...
2011-04-07 Johnny ChenAdd sanity checking for invalid register encodings...
2011-04-07 Johnny ChenAdd some more comments about checkings of invalid regis...
2011-04-07 Tanya LattnerPrevent ARM DAG Combiner from doing an AND or OR combin...
2011-04-07 Johnny ChenSanity check MSRi for invalid mask values and reject...
2011-04-07 Johnny ChenThe ARM disassembler was not recognizing USADA8 instruc...
2011-04-07 Evan ChengChange -arm-divmod-libcall to a target neutral option.
2011-04-07 Johnny ChenShould also check SMLAD for invalid register values.
2011-04-06 Owen AndersonTeach the ARM peephole optimizer that RSB, RSC, ADC...
2011-04-06 Owen AndersonCleanups from Jim: remove redundant constraints and...
2011-04-06 Jim GrosbachTidy up.
2011-04-06 Johnny ChenA8.6.393
2011-04-06 Johnny ChenA8.6.92 MCR (Encoding A1): if coproc == '101x' then...
2011-04-06 Johnny ChenFix a bug in the disassembly of VGETLNs8 where the...
2011-04-06 Johnny ChenAdd a missing opcode (SMLSLDX) to BadRegsMulFrm() function.
2011-04-05 Owen AndersonReapply r128946 (pseudoization of various instructions...
2011-04-05 Johnny ChenFix a typo in the handling of PKHTB opcode, plus add...
2011-04-05 Bob WilsonClean up some code for clarity.
2011-04-05 Owen AndersonRevert r128946 while I figure out why it broke the...
2011-04-05 Johnny ChenA7.3 register encoding
2011-04-05 Owen AndersonGive RSBS and RSCS the pseudo treatment.
2011-04-05 Johnny ChenARM disassembler was erroneously accepting an invalid...
2011-04-05 Johnny ChenARM disassembler was erroneously accepting an invalid...
2011-04-05 Owen AndersonFix bugs in the pseuo-ization of ADCS/SBCS pointed...
2011-04-05 Johnny ChenThe r128085 checkin modified the operand ordering for...
2011-04-05 Johnny ChenARM disassembler should flag (rGPRRegClassID, r13|r15...
2011-04-05 Jim GrosbachMake second source operand of LDRD pre/post explicit.
2011-04-05 Johnny ChenConstants with multiple encodings (ARM):
2011-04-05 Johnny ChenCheck for invalid register encodings for UMAAL and...
2011-04-05 Owen AndersonConvert ADCS and SBCS instructions into pseudos that...
2011-04-05 Bill WendlingRevamp the SjLj "dispatch setup" intrinsic.
2011-04-05 Eric ChristopherJust use BL all the time. It's safer that way.
2011-04-05 Johnny ChenFix SRS/SRSW encoding bits.
2011-04-04 Johnny ChenA8.6.105 MUL
2011-04-04 Johnny ChenRFE encoding should also specify the "should be" encodi...
2011-04-04 Johnny ChenFix incorrect alignment for NEON VST2b32_UPD.
2011-04-04 Bruno Cardoso Lopes- Implement asm parsing support for LDRSBT, LDRHT,...
2011-04-02 Cameron ZwarichDo some peephole optimizations to remove pointless...
2011-04-02 Johnny ChenFixed a bug in disassembly of STR_POST, where the immed...
2011-04-01 Johnny ChenFixed MOVr for "should be" encoding bits for Inst{19...
2011-04-01 Johnny ChenMOVs should have Inst{19-16} as 0b0000, otherwise,...
2011-04-01 Johnny ChenFix the instruction table entries for AI1_adde_sube_s_i...
2011-04-01 Evan ChengAvoid de-referencing pass beginning of a basic block...
2011-04-01 Owen AndersonWhen the architecture is explicitly armv6 or thumbv6...
2011-04-01 Jim GrosbachLDRD/STRD instructions should print both Rt and Rt2...
2011-04-01 Johnny ChenFix a LDRT/LDRBT decoding bug where for Encoding A2...
2011-04-01 Johnny ChenFix LDRi12 immediate operand, which was changed to...
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