Cleanup whitespace.
[oota-llvm.git] / lib / Target / ARM /
2012-06-14 Jush LuCleanup whitespace.
2012-06-12 Chad Rosier[arm-fast-isel] Add support for -arm-long-calls.
2012-06-11 Bill WendlingRe-enable the CMN instruction.
2012-06-07 Andrew TrickContinue factoring computeOperandLatency. Use it for...
2012-06-07 Andrew TrickARM getOperandLatency rewrite.
2012-06-07 Andrew TrickARM getOperandLatency should return -1 for unknown...
2012-06-07 Andrew TrickFix ARM getInstrLatency logic to work with the current...
2012-06-06 Benjamin KramerRemove unused private fields found by clang's new ...
2012-06-06 Richard BartonCorrect decoder for T1 conditional B encoding
2012-06-05 Andrew Trickmisched: API for minimum vs. expected latency.
2012-06-05 Andrew TrickARM itinerary properties.
2012-06-05 Andrew Trickmisched: Added MultiIssueItineraries.
2012-06-05 Joel JonesRevert commit r157966
2012-06-04 Joel JonesThis change handles a another case for generating the...
2012-06-02 Benjamin KramerFix typos found by github.com/lyda/misspell-check
2012-06-01 Jakob Stoklund OlesenSwitch all register list clients to the new MC*Iterator...
2012-06-01 Chad Rosier[arm-fast-isel] Fix handling of the frameaddress intrin...
2012-06-01 Manman RenARM: properly handle alignment for struct byval.
2012-06-01 Manman RenARM: support struct byval in llvm
2012-05-30 Jakob Stoklund OlesenAvoid depending on list orders and register numbering.
2012-05-30 Chad Rosier[arm-fast-isel] Add support for the llvm.frameaddress...
2012-05-25 Justin HolewinskiChange interface for TargetLowering::LowerCallTo and...
2012-05-24 Craig TopperMake some opcode tables static and const. Allows code...
2012-05-24 Craig TopperMark a static array as const.
2012-05-24 Craig TopperMark a static table as const. Shrink opcode size in...
2012-05-23 Chad Rosier[arm-fast-isel] Add support for non-global callee.
2012-05-22 NAKAMURA TakumiARMDisassembler.cpp: Fix utf8 char in comments.
2012-05-21 Jim GrosbachARM: .end_data_region mismatch in Thumb2.
2012-05-21 Jim GrosbachThumb2: RSB source register should be rGRP not GPRnopc.
2012-05-20 Jakob Stoklund OlesenUse the right register class for LDRrs.
2012-05-20 Jakob Stoklund OlesenTransfer memory operands to the right instruction.
2012-05-18 Jim GrosbachRefactor data-in-code annotations.
2012-05-17 Kevin EnderbyFix the encoding of the armv7m (MClass) for MSR APSR...
2012-05-17 Tim NorthoverRemove incorrect pattern for ARM SMML instruction.
2012-05-15 Jim GrosbachAllow MCCodeEmitter access to the target MCRegisterInfo.
2012-05-14 David BlaikieFix use of uninitialized variable.
2012-05-11 Chad Rosier[fast-isel] Add support for selecting @llvm.trap().
2012-05-11 Chad Rosier[fast-isel] Remove -disable-arm-fast-isel option. ...
2012-05-11 Chad Rosier[fast-isel] Cleaner fix for when we're unable to handle...
2012-05-11 Chad Rosier[fast-isel] Rather then assert (or segfault in a non...
2012-05-11 Chad RosierThe return type is an unsigned, not a bool.
2012-05-11 Manman RenAdd space before an open parenthesis in control flow...
2012-05-11 Silviu BarangaAdded the missing bit definition for the 4th bit of...
2012-05-11 Silviu BarangaFixed the LLVM ARM v7 assembler and instruction printer...
2012-05-11 Manman RenARM: peephole optimization to remove cmp instruction
2012-05-10 Manman RenRevert: 156550 "ARM: peephole optimization to remove...
2012-05-10 Manman RenARM: peephole optimization to remove cmp instruction
2012-05-07 Jakob Stoklund OlesenAdd an MF argument to TRI::getPointerRegClass() and...
2012-05-05 Jim GrosbachNuke a few dead remnants of the CBE.
2012-05-05 Benjamin KramerAdd a new target hook "predictableSelectIsExpensive".
2012-05-04 Kevin EnderbyTweak to the fix in r156212, as with the change in...
2012-05-04 Kevin EnderbyFix a bug in the ARM disassembler for wide branch condi...
2012-05-04 Sebastian PopAdded missing CMN case in Thumb2SizeReduction pass...
2012-05-04 Matt Beaumont-GayPacify GCC's -Wreturn-type
2012-05-04 Hans WennborgMake ARM and Mips use TargetMachine::getTLSModel()
2012-05-04 Jakob Stoklund OlesenRemove the SubRegClasses field from RegisterClass descr...
2012-05-03 Kevin EnderbyFix issues with the ARM bl and blx thumb instructions...
2012-05-03 Silviu BarangaFixed disassembler for vstm/vldm ARM VFP instructions.
2012-05-02 Jim GrosbachARM: Add missing two-operand VBIC aliases.
2012-05-02 Richard BartonDisallow YIELD and other allocated nop hints in pre...
2012-05-01 Jim GrosbachARM: Add a few missing add->sub aliases w/ 'w' suffix.
2012-05-01 Jim GrosbachARM: allow vanilla expressions for movw/movt.
2012-05-01 Bill WendlingChange the PassManager from a reference to a pointer.
2012-04-30 Jim GrosbachARM: Diagnostics for out of range fixups.
2012-04-30 Jakob Stoklund OlesenFix address calculation error from r155744.
2012-04-30 Bob WilsonDon't introduce illegal types when creating vmull opera...
2012-04-28 Jakob Stoklund OlesenFix a problem with blocks that need to be split twice.
2012-04-27 Jim GrosbachARM: Thumb add(sp plus register) asm constraints.
2012-04-27 Jim GrosbachARM: Tweak tADDrSP definition for consistent operand...
2012-04-27 Jakob Stoklund OlesenTrack worst case alignment padding more accurately.
2012-04-27 Lang HamesFix the order of the operands in the llvm.fma intrinsic...
2012-04-27 Richard BartonFix ARM assembly parsing for upper case condition codes...
2012-04-27 Richard BartonRefactor IT handling not to store the bottom bit of...
2012-04-27 Evan ChengImplement a bastardized ABI.
2012-04-27 Evan Cheng- thumbv6 shouldn't imply +thumb2. Cortex-M0 doesn...
2012-04-26 Jim GrosbachARM: Thumb ldr(literal) base address alignment is 32...
2012-04-26 Tim NorthoverUse VLD1 in NEON extenting-load patterns instead of...
2012-04-26 Tim NorthoverTest commit.
2012-04-26 Evan ChengIf triple is armv7 / thumbv7 and a CPU is specified...
2012-04-25 Richard BartonUnify internal representation of ARM instructions with...
2012-04-25 Craig TopperAdd ifdef around getSubtargetFeatureName in tablegen...
2012-04-24 Jim GrosbachARM: improved assembler diagnostics for missing CPU...
2012-04-24 Jim GrosbachARM: Nuke remnant bogus code.
2012-04-24 Richard BartonRefactor Thumb ITState handling in ARM Disassembler...
2012-04-23 Jim GrosbachTidy up. 80 columns, whitespace, et. al.
2012-04-23 Preston GurdThis patch fixes a problem which arose when using the...
2012-04-23 Jim GrosbachARM: VSLI two-operand assmebly aliases are tblgen'erated.
2012-04-23 Jim GrosbachARM: tblgen'erate VSRA/VRSRA/VSRI assembly two-operand...
2012-04-23 Jim GrosbachARM: vqdmulh two-operand aliases are tblgen'erated...
2012-04-22 Benjamin KramerARM: Initialize the HasRAS bit.
2012-04-20 Jim GrosbachARM: tblgen'erate more NEON two-operand aliases.
2012-04-20 Jim GrosbachARM: tblgen'erate more NEON two-operand aliases.
2012-04-20 Jim GrosbachARM: Update NEON assembly two-operand aliases.
2012-04-20 Craig TopperConvert more uses of XXXRegisterClass to &XXXRegClass...
2012-04-20 Jim GrosbachARM some VFP tblgen'erated two-operand aliases.
2012-04-19 Jim GrosbachARM let TableGen handle a few two-operand aliases.
2012-04-18 Silviu BarangaAdded support for disassembling unpredictable swp/swpb...
2012-04-18 Silviu BarangaFix the bahavior of the disassembler when decoding...
2012-04-18 Silviu BarangaAdded support for unpredictable mcrr/mcrr2/mrrc/mrrc2...
2012-04-18 Silviu BarangaFixed decoding for the ARM cdp2 instruction. The restri...
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