Add more unimplemented asm modifiers and some documentation of what they
[oota-llvm.git] / lib / Target / ARM /
2011-05-24 Eric ChristopherAdd more unimplemented asm modifiers and some documenta...
2011-05-24 Eric ChristopherAdd support for the arm 'y' asm modifier.
2011-05-23 Cameron ZwarichFix <rdar://problem/9476260> by having tail calls alway...
2011-05-22 Renato GolinRTABI chapter 4.3.4 specifies __eabi_mem* calls. Specif...
2011-05-22 Johnny ChenFix Bug 9386 - ARM disassembler failed to disassemble...
2011-05-20 Rafael Espindolaadds some attributes to attribute section when cpu...
2011-05-20 Rafael Espindolafixes target address tBL and tBLX and sets relocation...
2011-05-20 Evan ChengRevert accidental commit.
2011-05-20 Evan ChengRevert r131664 and fix it in instcombine instead. rdar...
2011-05-19 Jason W KimThis fixes one divergence between LLVM and binutils...
2011-05-19 Jim Grosbach80 columns.
2011-05-19 Mon P WangFixed sdiv and udiv for <4 x i16>. The test from r1254...
2011-05-19 Cameron ZwarichReuse the TargetInstrDesc.
2011-05-19 Cameron ZwarichCorrectly constrain a register class when computing...
2011-05-18 Tanya LattnerHandle perfect shuffle case that generates a vrev for...
2011-05-18 Cameron ZwarichFix more of PR8825. Now all of CodeGen/ARM passes with...
2011-05-18 Johnny ChenDisassembly of tBcc was wrongly adding 4 to the SignExt...
2011-05-18 Evan ChengRevise r131553. Just use the type of the input node...
2011-05-18 Evan ChengFix an ARMTargetLowering::LowerSELECT bug: legalized...
2011-05-18 Tanya LattnerIn r131488 I misunderstood how VREV works. It splits...
2011-05-18 Cameron ZwarichFix typo.
2011-05-18 Cameron ZwarichFix more of PR8825 by correctly using rGPR registers...
2011-05-17 Cameron ZwarichActually, the address operand of the Thumb2 LDREX ...
2011-05-17 Cameron ZwarichCorrect a minor problem with the Thumb2 LDREX and STREX...
2011-05-17 Tanya Lattnervrev is incorrectly defined in the perfect shuffle...
2011-05-16 Jim GrosbachKill some dead code.
2011-05-16 Rafael Espindolasets bit 0 of the function address of thumb function...
2011-05-11 Owen AndersonFix encoding of Thumb BLX register instructions. Patch...
2011-05-11 Bill WendlingGive the 'eh.sjlj.dispatchsetup' intrinsic call the...
2011-05-10 Jason W KimFirst cut at getting debugging support for ARM/MC/ELF/.o
2011-05-09 Mon P WangFixed MC encoding for index_align for VLD1/VST1 (single...
2011-05-07 Jakob Stoklund OlesenEliminate the ARM sub-register indexes that are not...
2011-05-07 Eric ChristopherFix the non-MC encoding of pkhbt and pkhtb.
2011-05-06 Eli FriedmanMake the logic for determining function alignment more...
2011-05-06 Rafael EspindolaDead code elimination.
2011-05-04 Devang PatelDo not emit location expression size twice.
2011-05-03 Jakob Stoklund OlesenMark ultra-super-registers QQQQ as call-clobbered inste...
2011-05-03 Bob WilsonTemporarily disable use of divmod compiler-rt functions...
2011-05-03 Bruno Cardoso LopesFold ARM coprocessor intrinsics patterns into the instr...
2011-05-03 Bruno Cardoso LopesAdd a few ARM coprocessor intrinsics. Testcases included
2011-05-03 Dan GohmanAdd an unfolded offset field to LSR's Formula record...
2011-05-02 Eric ChristopherApparently the check for direct calls is unnecessary.
2011-04-29 Eric Christopher80-col.
2011-04-29 Eli FriedmanZap a couple now-unused functions.
2011-04-29 Eli FriedmanSwitch to ImmLeaf (which can be used by FastISel) for...
2011-04-29 Eric ChristopherAdd FastEmitInst_ii for the arm fast isel generator...
2011-04-29 Eric ChristopherSome cleanup and optimize fallthrough more.
2011-04-29 Eli FriedmanRe-committing r130454, which does not in fact break...
2011-04-29 Eric ChristopherAdd trunc->branch support, this won't help with clang...
2011-04-29 Daniel DunbarMCExpr: Add FindAssociatedSection, which attempts to...
2011-04-29 Andrew TrickTeach Thumb2 isel to fold and->rotr ==> ROR.
2011-04-29 Chris Lattneruse the MachineInstrBuilder operator-> to simplify...
2011-04-29 Eric ChristopherUpdate comments and checks to match reality.
2011-04-29 Eric ChristopherWhitespace.
2011-04-28 Eli FriedmanRevert r130454; apparently this doesn't actually work.
2011-04-28 Eli FriedmanFix a rather obscure crash caused by ARM fast-isel...
2011-04-28 Eric ChristopherBe more layout aware here and swap the successor and...
2011-04-28 Eric ChristopherLet the immediate leaf pattern take transforms and...
2011-04-28 Devang PatelTeach dwarf writer to handle complex address expression...
2011-04-27 Kevin EnderbyFix a bug in the case that there is no add or subtract...
2011-04-27 Devang PatelRevert r130178. It turned out to be not the optimal...
2011-04-26 Jim GrosbachARM and Thumb2 support for atomic MIN/MAX/UMIN/UMAX...
2011-04-26 Jakob Stoklund OlesenAdd a TRI::getLargestLegalSuperClass hook to provide...
2011-04-26 Devang PatelLet dwarf writer allocate extra space in the debug...
2011-04-24 Sebastian RedlFix Target/ARM/Thumb1FrameLowering.h header guard.
2011-04-23 Andrew TrickThumb2 and ARM add/subtract with carry fixes.
2011-04-23 Andrew Trickwhitespace
2011-04-22 Johnny ChenDisassembly of A8.6.59 LDR (literal) Encoding T1 (16...
2011-04-22 Devang PatelAdd asserts.
2011-04-22 Evan ChengIn Thumb2 mode, lower frame indix references to:
2011-04-21 Devang PatelFix DWARF description of Q registers.
2011-04-21 Devang PatelFix DWARF description of S registers.
2011-04-21 Devang PatelAs per ARM docs, register Dx is described as DW_OP_regx...
2011-04-20 Evan ChengRemove -use-divmod-libcall. Let targets opt in when...
2011-04-20 Jakob Stoklund OlesenPrefer cheap registers for busy live ranges.
2011-04-20 Stuart HastingsExcise unintended hunk in 129858. <rdar://problem...
2011-04-20 Stuart HastingsARM byval support. Will be enabled by another patch...
2011-04-19 Johnny ChenFix typo in the comment.
2011-04-19 Daniel DunbarADT/Triple: Move a variety of clients to using isOSDarw...
2011-04-19 Eric ChristopherRemove some duplicate op action entries and reorganize.
2011-04-19 Bob WilsonThis patch combines several changes from Evan Cheng...
2011-04-19 Bob WilsonAdd -mcpu=cortex-a9-mp. It's cortex-a9 with MP extensio...
2011-04-19 Bob WilsonAvoid some 's' 16-bit instruction which partially updat...
2011-04-19 Bob WilsonAvoid write-after-write issue hazards for Cortex-A9.
2011-04-19 Bob WilsonSome single-precision VFP instructions can execute...
2011-04-19 Bob WilsonImprovements for the Cortex-A9 scheduling itineraries.
2011-04-19 Evan ChengChange A9 scheduling itineraries VLD* / VST* entries...
2011-04-19 Evan ChengDo not lose mem_operands while lowering VLD / VST intri...
2011-04-18 Jim GrosbachTrim a few unneeded includes.
2011-04-18 Sean CallananSmall fix to the ARM AsmParser to ensure that a
2011-04-16 Stuart HastingsCorrect result when a branch condition is live across...
2011-04-15 Johnny ChenThumb2 BFC was insufficiently encoded.
2011-04-15 Johnny ChenA8.6.315 VLD3 (single 3-element structure to all lanes)
2011-04-15 Cameron ZwarichAdd ORR and EOR to the CMP peephole optimizer. It's...
2011-04-15 Cameron ZwarichThe AND instruction leaves the V flag unmodified, so...
2011-04-15 Cameron ZwarichAdd missing register forms of instructions to the ARM...
2011-04-15 Chris LattnerFix a ton of comment typos found by codespell. Patch by
2011-04-15 Evan ChengFix another fcopysign lowering bug. If src is f64 and...
2011-04-15 Johnny ChenFor t2BFI, both Inst{26} and Inst{5} "should" be 0.
2011-04-15 Johnny ChenThe ARM disassembler did not handle the alignment corre...
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