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Rename memrr ptrreg and offreg components.
[oota-llvm.git]
/
lib
/
Target
/
Hexagon
/
HexagonInstrInfo.td
2013-03-08
Jyotsna Verma
Hexagon: Add patterns for zero extended loads from...
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2013-03-07
Jyotsna Verma
Hexagon: Add support to lower block address.
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2013-03-05
Jyotsna Verma
reverting patch 176508.
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2013-03-05
Jyotsna Verma
Hexagon: Add support for lowering block address.
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2013-03-05
Jyotsna Verma
Hexagon: Add encoding bits to the TFR64 instructions.
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2013-02-14
Jyotsna Verma
Hexagon: Change insn class to support instruction encoding.
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2013-02-05
Jakob Stoklund Olesen
Move MRI liveouts to Hexagon return instructions.
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2013-02-04
Jyotsna Verma
Hexagon: Add V4 combine instructions and some more...
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2013-01-29
Jyotsna Verma
Use multiclass for post-increment store instructions.
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2013-01-29
Jyotsna Verma
Add constant extender support for MInst type instructions.
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2013-01-07
Craig Topper
Remove more unnecessary # operators with nothing to...
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2013-01-07
Craig Topper
Remove # from the beginning and end of def names. The...
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2012-12-20
Jyotsna Verma
Add constant extender support to GP-relative load/store...
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2012-12-04
Jyotsna Verma
Add patterns to define 'combine', 'tstbit', 'ct0/cl0...
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2012-12-04
Jyotsna Verma
Add constant extender support to ALU32 instructions...
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2012-12-04
Jyotsna Verma
Move all operand definitions into HexagonOperands.td
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2012-12-04
Jyotsna Verma
Move generic Hexagon subtarget information into Hexagon.td
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2012-12-03
Jyotsna Verma
Define store instructions with base+immediate offset...
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2012-12-03
Jyotsna Verma
Define load instructions with base+immediate offset...
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2012-11-30
Jyotsna Verma
Use multiclass for the load instructions with MEMri...
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2012-11-30
Jyotsna Verma
Use multiclass for the store instructions with MEMri...
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2012-11-29
Jyotsna Verma
Use multiclass for 'transfer' instructions.
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2012-11-21
Jyotsna Verma
Renamed HexagonImmediates.td -> HexagonOperands.td.
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2012-11-14
Jyotsna Verma
Added multiclass for post-increment load instructions.
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2012-11-13
Jyotsna Verma
Test commit.
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2012-11-01
Pranav Bhandarkar
Use the relationship models infrastructure to add two...
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2012-08-13
Arnold Schwaighofer
[Hexagon] Don't mark callee saved registers as clobbere...
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2012-07-13
Jakob Stoklund Olesen
Remove variable_ops from call instructions in most...
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2012-06-02
Benjamin Kramer
Fix typos found by github.com/lyda/misspell-check
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2012-05-14
Brendon Cahoon
Revert 156634 upon request until code improvement chang...
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2012-05-11
Brendon Cahoon
Hexagon constant extender support.
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2012-05-10
Sirish Pande
Hexagon V5 FP Support.
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2012-05-03
Sirish Pande
Extensions of Hexagon V4 instructions.
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2012-04-23
Chandler Carruth
Revert r155365, r155366, and r155367. All three of...
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2012-04-23
Sirish Pande
Hexagon V5 (floating point) support.
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2012-04-23
Sirish Pande
Support for Hexagon architectural feature, new value...
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2012-04-23
Sirish Pande
Support for Hexagon VLIW Packetizer.
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2012-04-18
Chandler Carruth
This reverts a long string of commits to the Hexagon...
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2012-04-16
Sirish Pande
Hexagon V5 (Floating Point) Support.
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2012-04-13
Sirish Pande
Add support for Hexagon Architectural feature, New...
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2012-04-13
Sirish Pande
Pass to replace tranfer/copy instructions into combine...
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2012-04-12
Sirish Pande
HexagonPacketizer patch.
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2012-04-12
Evandro Menezes
Hexagon: enable assembler output through the MC layer.
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2012-02-22
Sirish Pande
Efficient pattern for store truncate. Patch by Evandro...
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2012-02-15
Sirish Pande
Optimize redundant sign extends and negation of predicates.
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2012-02-15
Eric Christopher
Revert "Optimize redundant sign extends and negation...
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2012-02-15
Sirish Pande
Optimize redundant sign extends and negation of predicates
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2012-02-08
Brendon Cahoon
Use TSFlag bit to describe instruction properties.
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2011-12-12
Tony Linthicum
Hexagon backend support
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