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Revert r199628: "[AArch64 NEON] Fix a bug caused by undef lane when generating VEXT."
[oota-llvm.git]
/
lib
/
Target
/
Hexagon
/
HexagonRegisterInfo.td
2013-05-31
Ahmed Bougacha
Make SubRegIndex size mandatory, following r183020.
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2012-05-10
Sirish Pande
Hexagon V5 FP Support.
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2012-05-04
Jakob Stoklund Olesen
Remove the SubRegClasses field from RegisterClass descr...
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2012-04-23
Chandler Carruth
Revert r155365, r155366, and r155367. All three of...
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2012-04-23
Sirish Pande
Hexagon V5 (floating point) support.
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2012-04-18
Chandler Carruth
This reverts a long string of commits to the Hexagon...
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2012-04-16
Sirish Pande
Hexagon V5 (Floating Point) Support.
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2012-02-23
Brendon Cahoon
Fix the numbering of some of the registers and reclassi...
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2012-02-18
Jia Liu
Emacs-tag and some comment fix for all ARM, CellSPU...
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2012-01-18
Jakob Stoklund Olesen
Add a CoveredBySubRegs property to Register descriptions.
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2011-12-12
Tony Linthicum
Hexagon backend support
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